Alexei Starovoitov <alexei.starovoitov@xxxxxxxxx> writes: > On Thu, Mar 21, 2024 at 4:05 AM Alexei Starovoitov > <alexei.starovoitov@xxxxxxxxx> wrote: >> >> On Thu, Mar 21, 2024 at 3:11 AM Puranjay Mohan <puranjay12@xxxxxxxxx> wrote: >> > >> > diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c >> > index e613eebfd349..e61a51a5b4be 100644 >> > --- a/arch/s390/net/bpf_jit_comp.c >> > +++ b/arch/s390/net/bpf_jit_comp.c >> > @@ -2691,3 +2691,8 @@ bool bpf_jit_supports_subprog_tailcalls(void) >> > { >> > return true; >> > } >> > + >> > +u64 bpf_arch_uaddress_limit(void) >> > +{ >> > + return -ENOTSUPP; >> > +} >> >> Looks good and should work, but s390 CI is still not happy. >> Ideas? >> sock tests were not failing before. So something is going on. > > I think I have an explanation. > -ENOTSUPP and u64... and later: > u64 uaddress_limit = bpf_arch_uaddress_limit() > if (uaddress_limit < 0) > > I bet the compiler simply removes this check since unsigned cannot > be negative. > Odd that there is no compiler warning. > > pw-bot: cr > Yes, I verified that the compiler is removing this: if (BPF_CLASS(insn->code) == BPF_LDX && a944: 7100047f cmp w3, #0x1 a948: 540013e1 b.ne abc4 <do_misc_fixups+0x66c> // b.any a94c: 721a041f tst w0, #0xc0 a950: 54fff4e1 b.ne a7ec <do_misc_fixups+0x294> // b.any u64 uaddress_limit = bpf_arch_uaddress_limit(); a954: b90003e6 str w6, [sp] a958: 94000000 bl 0 <bpf_arch_uaddress_limit> *patch++ = BPF_MOV64_REG(BPF_REG_AX, insn->src_reg); We should do: if (!uaddress_limit) goto next_insn; and in the disabled case return 0 in place of -ENOSUPP. Doing this adds the check: if (BPF_CLASS(insn->code) == BPF_LDX && a944: 7100047f cmp w3, #0x1 a948: 54001401 b.ne abc8 <do_misc_fixups+0x670> // b.any a94c: 721a041f tst w0, #0xc0 a950: 54fff4e1 b.ne a7ec <do_misc_fixups+0x294> // b.any u64 uaddress_limit = bpf_arch_uaddress_limit(); a954: b90003e6 str w6, [sp] a958: 94000000 bl 0 <bpf_arch_uaddress_limit> if (!uaddress_limit) a95c: b4fff020 cbz x0, a760 <do_misc_fixups+0x208> *patch++ = BPF_MOV64_REG(BPF_REG_AX, insn->src_reg); I will send v3 with this approach. Thanks, Puranjay