RE: [PATCH] drm/amd/pm: Fix output of pp_od_clk_voltage

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> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> Jonatas Esteves
> Sent: Tuesday, November 15, 2022 7:13 AM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Jonatas Esteves <jntesteves@xxxxxxxxx>
> Subject: [PATCH] drm/amd/pm: Fix output of pp_od_clk_voltage
> 
> Printing the other clock types should not be conditioned on being able
> to print OD_SCLK. Some GPUs currently have limited capability of only
> printing a subset of these.
> 
> Since this condition was introduced in v5.18-rc1, reading from
> `pp_od_clk_voltage` has been returning empty on the Asus ROG Strix G15
> (2021).
What's the output then with this patch applied?
Meanwhile can you show me the 'lspci' output( I wonder which asic is used on your system)?

BR
Evan
> 
> Fixes: 79c65f3fcbb1 ("drm/amd/pm: do not expose power implementation
> details to amdgpu_pm.c")
> ---
>  drivers/gpu/drm/amd/pm/amdgpu_pm.c | 12 +++++-------
>  1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index 236657eece47..9d364bbc78e1 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -869,13 +869,11 @@ static ssize_t
> amdgpu_get_pp_od_clk_voltage(struct device *dev,
>  	}
>  	if (ret == -ENOENT) {
>  		size = amdgpu_dpm_print_clock_levels(adev, OD_SCLK, buf);
> -		if (size > 0) {
> -			size += amdgpu_dpm_print_clock_levels(adev,
> OD_MCLK, buf + size);
> -			size += amdgpu_dpm_print_clock_levels(adev,
> OD_VDDC_CURVE, buf + size);
> -			size += amdgpu_dpm_print_clock_levels(adev,
> OD_VDDGFX_OFFSET, buf + size);
> -			size += amdgpu_dpm_print_clock_levels(adev,
> OD_RANGE, buf + size);
> -			size += amdgpu_dpm_print_clock_levels(adev,
> OD_CCLK, buf + size);
> -		}
> +		size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK,
> buf + size);
> +		size += amdgpu_dpm_print_clock_levels(adev,
> OD_VDDC_CURVE, buf + size);
> +		size += amdgpu_dpm_print_clock_levels(adev,
> OD_VDDGFX_OFFSET, buf + size);
> +		size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE,
> buf + size);
> +		size += amdgpu_dpm_print_clock_levels(adev, OD_CCLK,
> buf + size);
>  	}
> 
>  	if (size == 0)
> --
> 2.30.2




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