[PATCH 00/43] Add support for DCN 3.2

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These patches add support for DCN (Display Core Next) version
3.2.x.  Patch 4 adds new register headers and is too big for
the mailing list.

Alvin Lee (4):
  drm/amd/display: Add missing instance for clock source register
  drm/amd/display: Implement WM table transfer for DCN32/DCN321
  drm/amd/display: Remove W/A for ODM memory pins
  drm/amd/display: Implement DTBCLK ref switching on dcn32

Aurabindo Pillai (17):
  drm/amd/display: remove stale config guards
  drm/amd: Add atomfirmware.h definitions needed for DCN32/321
  drm/amd/display: Add DCN32/321 version identifiers
  drm/amd: add register headers for DCN32/321
  drm/amd/display: Add DMCUB source files and changes for DCN32/321
  drm/amd/display: add dcn32 IRQ changes
  drm/amd/display: add GPIO changes for DCN32/321
  drm/amd/display: DML changes for DCN32/321
  drm/amd/display: add CLKMGR changes for DCN32/321
  drm/amd/display: add DCN32/321 specific files for Display Core
  drm/amd/display: Add dependant changes for DCN32/321
  drm/amd/display: Add DM support for DCN32/DCN321
  drm/amd/display: add DCN32 to IP discovery table
  drm/amd: Add GFX11 modifiers support to AMDGPU
  drm/amd/display: add missing interrupt handlers for DCN32/DCN321
  drm/amd/display: disable idle optimizations
  drm/amd/display: update disp pattern generator routine for DCN30

Chaitanya Dhere (1):
  drm/amd/display: FCLK P-state support updates

Charlene Liu (1):
  drm/amd/display: use updated clock source init routine

Dillon Varone (9):
  drm/amd/display: Fix USBC link creation
  drm/amd/display: Add guard for FCLK pstate message to PMFW for DCN321
  drm/amd/display: Various DML fixes to enable higher timings
  drm/amd/display: Select correct DTO source
  drm/amd/display: Ensure that DMCUB fw in use is loaded by DC and not
    VBIOS
  drm/amd/display: Add additional guard for FCLK pstate message for
    DCN321
  drm/amd/display: set dram speed for all states
  drm/amd/display: Disable DTB Ref Clock Switching in dcn32
  drm/amd/display: change dsc image width cap for dcn32 and dcn321

Duncan Ma (1):
  drm/amd/display: Add ODM seamless boot support

Eric Bernstein (1):
  drm/amd/display: Use DTBCLK for valid pixel clock

Fangzhi Zuo (1):
  drm/amd/display: Halve DTB Clock Value for DCN32

Jingwen Zhu (1):
  drm/amd/display: set link fec status during init for DCN32

Jun Lei (2):
  drm/amd/display: add new pixel rate programming
  drm/amd/display: Introduce new update_clocks logic

Martin Leung (1):
  drm/amd/display: cleaning up smu_if to add future flexibility

Rodrigo Siqueira (1):
  drm/amd/display: Drop unnecessary guard from DC resource

Samson Tam (3):
  drm/amd/display: do not override CURSOR_REQ_MODE when SubVP is not
    enabled
  drm/amd/display: Match dprefclk with clk registers
  drm/amd/display: Updates for OTG and DCCG clocks

 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c |      2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |     40 +-
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |     97 +-
 drivers/gpu/drm/amd/display/dc/Makefile       |      2 +
 .../drm/amd/display/dc/bios/bios_parser2.c    |    950 +-
 .../dc/bios/bios_parser_types_internal2.h     |      1 +
 .../drm/amd/display/dc/bios/command_table.c   |      4 +-
 .../display/dc/bios/command_table_helper2.c   |      2 +
 .../gpu/drm/amd/display/dc/clk_mgr/Makefile   |     35 +
 .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c  |     17 +-
 .../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c  |     15 +-
 .../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.h  |     60 +
 .../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c  |      8 +-
 .../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.h  |      2 +
 .../dc/clk_mgr/dcn315/dcn315_clk_mgr.c        |      7 +-
 .../dc/clk_mgr/dcn316/dcn316_clk_mgr.c        |      3 +-
 .../drm/amd/display/dc/clk_mgr/dcn32/dalsmc.h |     65 +
 .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c  |    725 +
 .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.h  |     39 +
 .../dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c  |    134 +
 .../dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h  |     46 +
 .../dc/clk_mgr/dcn32/dcn32_smu13_driver_if.h  |     63 +
 .../dc/clk_mgr/dcn32/smu13_driver_if.h        |    108 +
 drivers/gpu/drm/amd/display/dc/core/dc.c      |     14 +-
 .../gpu/drm/amd/display/dc/core/dc_link_dp.c  |      3 +
 .../gpu/drm/amd/display/dc/core/dc_resource.c |     27 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |     24 +
 .../gpu/drm/amd/display/dc/dc_bios_types.h    |      5 +
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |     31 +
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h  |      2 +
 drivers/gpu/drm/amd/display/dc/dc_hw_types.h  |      1 +
 drivers/gpu/drm/amd/display/dc/dc_stream.h    |     21 +
 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h  |     45 +
 .../drm/amd/display/dc/dce/dce_clock_source.c |     27 +
 .../drm/amd/display/dc/dce/dce_clock_source.h |     15 +
 .../display/dc/dce110/dce110_hw_sequencer.c   |      6 +
 .../drm/amd/display/dc/dcn10/dcn10_hubbub.h   |     33 +
 .../amd/display/dc/dcn10/dcn10_link_encoder.h |      6 +
 .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.h |      5 +
 .../display/dc/dcn10/dcn10_stream_encoder.h   |     32 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h |     34 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h |     25 +-
 .../drm/amd/display/dc/dcn20/dcn20_hwseq.c    |     46 +-
 .../dc/dcn30/dcn30_dio_stream_encoder.c       |     16 +-
 .../dc/dcn30/dcn30_dio_stream_encoder.h       |     35 +
 .../gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c  |      8 +-
 .../gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h  |     16 +
 .../drm/amd/display/dc/dcn30/dcn30_hwseq.c    |     33 +-
 .../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c  |     14 +-
 .../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h  |    147 +
 .../gpu/drm/amd/display/dc/dcn30/dcn30_optc.h |      9 +
 .../gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c |    106 +-
 .../gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h |     16 +-
 .../gpu/drm/amd/display/dc/dcn31/dcn31_optc.c |      1 +
 .../gpu/drm/amd/display/dc/dcn31/dcn31_optc.h |      6 +-
 drivers/gpu/drm/amd/display/dc/dcn32/Makefile |     37 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c |    303 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.h |    159 +
 .../display/dc/dcn32/dcn32_dio_link_encoder.c |    294 +
 .../display/dc/dcn32/dcn32_dio_link_encoder.h |     60 +
 .../dc/dcn32/dcn32_dio_stream_encoder.c       |    461 +
 .../dc/dcn32/dcn32_dio_stream_encoder.h       |    266 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_dpp.c  |    164 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_dpp.h  |     38 +
 .../dc/dcn32/dcn32_hpo_dp_link_encoder.c      |     90 +
 .../dc/dcn32/dcn32_hpo_dp_link_encoder.h      |     63 +
 .../drm/amd/display/dc/dcn32/dcn32_hubbub.c   |    964 +
 .../drm/amd/display/dc/dcn32/dcn32_hubbub.h   |    172 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c |    148 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_hubp.h |     69 +
 .../drm/amd/display/dc/dcn32/dcn32_hwseq.c    |    958 +
 .../drm/amd/display/dc/dcn32/dcn32_hwseq.h    |     66 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_init.c |    156 +
 .../dcn32_init.h}                             |     20 +-
 .../drm/amd/display/dc/dcn32/dcn32_mmhubbub.c |    239 +
 .../drm/amd/display/dc/dcn32/dcn32_mmhubbub.h |    225 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c  |    810 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h  |    213 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_optc.c |    268 +
 .../gpu/drm/amd/display/dc/dcn32/dcn32_optc.h |    254 +
 .../drm/amd/display/dc/dcn32/dcn32_resource.c |   4002 +
 .../drm/amd/display/dc/dcn32/dcn32_resource.h |     88 +
 .../gpu/drm/amd/display/dc/dcn321/Makefile    |     34 +
 .../dc/dcn321/dcn321_dio_link_encoder.c       |    199 +
 .../dc/dcn321/dcn321_dio_link_encoder.h       |     42 +
 .../amd/display/dc/dcn321/dcn321_resource.c   |   2335 +
 .../dcn321_resource.h}                        |     46 +-
 drivers/gpu/drm/amd/display/dc/dml/Makefile   |      7 +
 .../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c  |     36 +-
 .../dc/dml/dcn30/display_mode_vba_30.c        |      8 +-
 .../dc/dml/dcn31/display_mode_vba_31.c        |      2 +-
 .../dc/dml/dcn32/display_mode_vba_32.c        |   3835 +
 .../dc/dml/dcn32/display_mode_vba_32.h        |     57 +
 .../dc/dml/dcn32/display_mode_vba_util_32.c   |   6254 +
 .../dc/dml/dcn32/display_mode_vba_util_32.h   |   1175 +
 .../dc/dml/dcn32/display_rq_dlg_calc_32.c     |    616 +
 .../dc/dml/dcn32/display_rq_dlg_calc_32.h     |     70 +
 .../amd/display/dc/dml/display_mode_enums.h   |     88 +-
 .../drm/amd/display/dc/dml/display_mode_lib.c |     12 +
 .../drm/amd/display/dc/dml/display_mode_lib.h |     15 +
 .../amd/display/dc/dml/display_mode_structs.h |    132 +
 .../drm/amd/display/dc/dml/display_mode_vba.c |    171 +
 .../drm/amd/display/dc/dml/display_mode_vba.h |    242 +-
 .../gpu/drm/amd/display/dc/dml/dml_wrapper.c  |     73 +-
 drivers/gpu/drm/amd/display/dc/gpio/Makefile  |      8 +-
 .../display/dc/gpio/dcn32/hw_factory_dcn32.c  |    255 +
 .../hw_factory_dcn32.h}                       |     13 +-
 .../dc/gpio/dcn32/hw_translate_dcn32.c        |    349 +
 .../hw_translate_dcn32.h}                     |     11 +-
 .../gpu/drm/amd/display/dc/gpio/hw_factory.c  |     16 +-
 .../drm/amd/display/dc/gpio/hw_translate.c    |     13 +-
 .../gpu/drm/amd/display/dc/inc/core_types.h   |     10 +
 .../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h   |      3 +
 .../amd/display/dc/inc/hw/clk_mgr_internal.h  |     45 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h  |     44 +-
 .../gpu/drm/amd/display/dc/inc/hw/dchubbub.h  |      3 +
 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h  |      7 +
 .../drm/amd/display/dc/inc/hw/link_encoder.h  |      2 +
 .../gpu/drm/amd/display/dc/inc/hw/mem_input.h |      2 +
 .../amd/display/dc/inc/hw/stream_encoder.h    |      7 +
 .../amd/display/dc/inc/hw/timing_generator.h  |      8 +
 .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |      2 +
 .../amd/display/dc/inc/hw_sequencer_private.h |      8 +
 drivers/gpu/drm/amd/display/dc/inc/resource.h |      7 +
 drivers/gpu/drm/amd/display/dc/irq/Makefile   |     10 +-
 .../display/dc/irq/dcn32/irq_service_dcn32.c  |    432 +
 .../display/dc/irq/dcn32/irq_service_dcn32.h  |     35 +
 .../amd/display/dc/link/link_hwss_hpo_dp.c    |     19 +-
 drivers/gpu/drm/amd/display/dmub/dmub_srv.h   |      8 +
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |     26 +-
 drivers/gpu/drm/amd/display/dmub/src/Makefile |      1 +
 .../gpu/drm/amd/display/dmub/src/dmub_dcn32.c |    493 +
 .../gpu/drm/amd/display/dmub/src/dmub_dcn32.h |    256 +
 .../gpu/drm/amd/display/dmub/src/dmub_srv.c   |     51 +-
 .../amd/display/include/bios_parser_types.h   |     11 +
 .../gpu/drm/amd/display/include/dal_asic_id.h |      8 +
 .../gpu/drm/amd/display/include/dal_types.h   |      2 +
 .../include/asic_reg/dcn/dcn_3_2_0_offset.h   |  14675 +
 .../include/asic_reg/dcn/dcn_3_2_0_sh_mask.h  | 222890 +++++++++++++++
 .../include/asic_reg/dcn/dcn_3_2_1_offset.h   |  14559 +
 .../include/asic_reg/dcn/dcn_3_2_1_sh_mask.h  |  56578 ++++
 drivers/gpu/drm/amd/include/atomfirmware.h    |    209 +-
 include/uapi/drm/drm_fourcc.h                 |      2 +
 143 files changed, 339836 insertions(+), 512 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dalsmc.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_smu13_driver_if.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/smu13_driver_if.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/Makefile
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hpo_dp_link_encoder.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hpo_dp_link_encoder.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c
 rename drivers/gpu/drm/amd/display/dc/{gpio/diagnostics/hw_translate_diag.c => dcn32/dcn32_init.h} (74%)
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mmhubbub.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mmhubbub.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn321/Makefile
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
 rename drivers/gpu/drm/amd/display/dc/{gpio/diagnostics/hw_factory_diag.c => dcn321/dcn321_resource.h} (53%)
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
 rename drivers/gpu/drm/amd/display/dc/gpio/{diagnostics/hw_factory_diag.h => dcn32/hw_factory_dcn32.h} (81%)
 create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c
 rename drivers/gpu/drm/amd/display/dc/gpio/{diagnostics/hw_translate_diag.h => dcn32/hw_translate_dcn32.h} (82%)
 create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.h
 create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
 create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h

-- 
2.35.3




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