This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- Fixes and improvements in the LTTPR code
- Improve z-state
- Fix null pointer check
- Improve communication with s0i2
- Update multiple-display split policy
- Add missing registers
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thanks
Siqueira
Alvin Lee (1):
drm/amd/display: Fix check for null function ptr
Angus Wang (1):
drm/amd/display: Changed pipe split policy to allow for multi-display
pipe split
Anthony Koo (1):
drm/amd/display: [FW Promotion] Release 0.0.98
Aric Cyr (1):
drm/amd/display: 3.2.167
Charlene Liu (1):
drm/amd/display: fix B0 TMDS deepcolor no dislay issue
George Shen (2):
drm/amd/display: Limit max link cap with LTTPR caps
drm/amd/display: Remove CR AUX RD Interval limit for LTTPR
Lai, Derek (1):
drm/amd/display: Added power down for DCN10
Martin Leung (1):
drm/amd/display: Undo ODM combine
Nicholas Kazlauskas (3):
drm/amd/display: Block z-states when stutter period exceeds criteria
drm/amd/display: Send s0i2_rdy in stream_count == 0 optimization
drm/amd/display: Set optimize_pwr_state for DCN31
Shen, George (1):
drm/amd/display: Refactor vendor specific link training sequence
Wenjing Liu (5):
drm/amd/display: define link res and make it accessible to all link
interfaces
drm/amd/display: populate link res in both detection and validation
drm/amd/display: access hpo dp link encoder only through link resource
drm/amd/display: support dynamic HPO DP link encoder allocation
drm/amd/display: get and restore link res map
Wesley Chalmers (1):
drm/amd/display: Add reg defs for DCN303
.../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 1 +
drivers/gpu/drm/amd/display/dc/core/dc.c | 18 -
.../gpu/drm/amd/display/dc/core/dc_debug.c | 2 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 234 +++++---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 501 +++++++++++++++---
.../drm/amd/display/dc/core/dc_link_dpia.c | 48 +-
.../drm/amd/display/dc/core/dc_link_hwss.c | 63 ++-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 199 ++++---
drivers/gpu/drm/amd/display/dc/dc.h | 3 +-
drivers/gpu/drm/amd/display/dc/dc_link.h | 15 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 14 +-
.../gpu/drm/amd/display/dc/dcn10/dcn10_init.c | 1 +
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 5 +-
.../amd/display/dc/dcn201/dcn201_resource.c | 2 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 13 +-
.../amd/display/dc/dcn301/dcn301_resource.c | 2 +-
.../amd/display/dc/dcn302/dcn302_resource.c | 2 +-
.../drm/amd/display/dc/dcn303/dcn303_dccg.h | 20 +-
.../amd/display/dc/dcn303/dcn303_resource.c | 2 +-
.../dc/dcn31/dcn31_hpo_dp_link_encoder.c | 6 +-
.../dc/dcn31/dcn31_hpo_dp_link_encoder.h | 3 +-
.../gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 1 +
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 27 +-
.../drm/amd/display/dc/dcn31/dcn31_resource.h | 31 ++
.../gpu/drm/amd/display/dc/dml/dml_wrapper.c | 2 +-
.../gpu/drm/amd/display/dc/inc/core_status.h | 2 +
.../gpu/drm/amd/display/dc/inc/core_types.h | 17 +
.../gpu/drm/amd/display/dc/inc/dc_link_dp.h | 15 +-
.../gpu/drm/amd/display/dc/inc/dc_link_dpia.h | 5 +-
.../drm/amd/display/dc/inc/hw/link_encoder.h | 3 +-
.../gpu/drm/amd/display/dc/inc/link_hwss.h | 10 +-
drivers/gpu/drm/amd/display/dc/inc/resource.h | 6 +-
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +-
.../gpu/drm/amd/display/dmub/src/dmub_srv.c | 4 +-
36 files changed, 964 insertions(+), 321 deletions(-)
--
2.25.1
