On Thu, Jun 4, 2020 at 12:47 AM Evan Quan <evan.quan@xxxxxxx> wrote: > > Those common operations(for all ASICs) are placed first and followed > by ASIC specific ones. While the display related are placed at the last. > > Change-Id: Id45caee98273c8c0b9c1c9f2713fcf8106e02000 > Signed-off-by: Evan Quan <evan.quan@xxxxxxx> Typo in the subject and clarification: drm/amd/powerplay: sort the operations performed in hw setup With that fixed: Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 61 +++++++++++----------- > 1 file changed, 31 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > index 4c1f7c36b74b..b3410d111316 100644 > --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > @@ -1134,6 +1134,21 @@ static int smu_smc_table_hw_init(struct smu_context *smu, > if (ret) > return ret; > > + /* > + * Set PMSTATUSLOG table bo address with SetToolsDramAddr MSG for tools. > + */ > + ret = smu_set_tool_table_location(smu); > + if (ret) > + return ret; > + > + /* > + * Use msg SetSystemVirtualDramAddr and DramLogSetDramAddr can notify > + * pool location. > + */ > + ret = smu_notify_memory_pool_location(smu); > + if (ret) > + return ret; > + > /* smu_dump_pptable(smu); */ > /* > * Copy pptable bo in the vram to smc with SMU MSGs such as > @@ -1147,6 +1162,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu, > ret = smu_run_btc(smu); > if (ret) > return ret; > + > ret = smu_feature_set_allowed_mask(smu); > if (ret) > return ret; > @@ -1155,6 +1171,21 @@ static int smu_smc_table_hw_init(struct smu_context *smu, > if (ret) > return ret; > > + if (!smu_is_dpm_running(smu)) > + pr_info("dpm has been disabled\n"); > + > + ret = smu_override_pcie_parameters(smu); > + if (ret) > + return ret; > + > + ret = smu_enable_thermal_alert(smu); > + if (ret) > + return ret; > + > + ret = smu_i2c_eeprom_init(smu, &adev->pm.smu_i2c); > + if (ret) > + return ret; > + > ret = smu_disable_umc_cdr_12gbps_workaround(smu); > if (ret) { > pr_err("Workaround failed to disable UMC CDR feature on 12Gbps SKU!\n"); > @@ -1185,36 +1216,6 @@ static int smu_smc_table_hw_init(struct smu_context *smu, > if (ret) > return ret; > > - ret = smu_override_pcie_parameters(smu); > - if (ret) > - return ret; > - > - /* > - * Set PMSTATUSLOG table bo address with SetToolsDramAddr MSG for tools. > - */ > - ret = smu_set_tool_table_location(smu); > - if (ret) > - return ret; > - > - if (!smu_is_dpm_running(smu)) > - pr_info("dpm has been disabled\n"); > - > - /* > - * Use msg SetSystemVirtualDramAddr and DramLogSetDramAddr can notify > - * pool location. > - */ > - ret = smu_notify_memory_pool_location(smu); > - if (ret) > - return ret; > - > - ret = smu_enable_thermal_alert(smu); > - if (ret) > - return ret; > - > - ret = smu_i2c_eeprom_init(smu, &adev->pm.smu_i2c); > - if (ret) > - return ret; > - > return ret; > } > > -- > 2.27.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx