On Mon, Apr 27, 2020 at 12:47 PM Kent Russell <kent.russell@xxxxxxx> wrote:
>
> Add support for unique_id for Arcturus, since we only have the ppsmc
> definitions for that added at the moment
>
> Signed-off-by: Kent Russell <kent.russell@xxxxxxx>
> Change-Id: I66f8e9ff41521d6c13ff673587d6061c1f3f4b7a
> ---
> drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
> index e98d92ec1eac..f55f9b371bf2 100644
> --- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
> @@ -293,6 +293,7 @@ static int arcturus_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER
> static int arcturus_tables_init(struct smu_context *smu, struct smu_table *tables)
> {
> struct smu_table_context *smu_table = &smu->smu_table;
> + uint32_t top32, bottom32;
>
> SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),
> PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
> @@ -315,6 +316,15 @@ static int arcturus_tables_init(struct smu_context *smu, struct smu_table *table
> return -ENOMEM;
> smu_table->metrics_time = 0;
>
> + if (smu->adev->asic_type == CHIP_ARCTURUS) {
> + /* Get the SN to turn into a Unique ID */
> + smu_send_smc_msg(smu, SMU_MSG_ReadSerialNumTop32,
> + &top32);
> + smu_send_smc_msg(smu, SMU_MSG_ReadSerialNumBottom32,
> + &bottom32);
> +
> + smu->adev->unique_id = ((uint64_t)bottom32 << 32) | top32;
I presume the top/bottom order is still backwards for consistency?
With that addressed, the series is:
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
> + }
> return 0;
> }
>
> --
> 2.17.1
>
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