[AMD Official Use Only - Internal Distribution Only]
Friendly ping
> -----Original Message-----
> From: Russell, Kent <Kent.Russell@xxxxxxx>
> Sent: Monday, April 27, 2020 12:48 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Russell, Kent <Kent.Russell@xxxxxxx>
> Subject: [PATCH 1/2] drm/amdgpu: Add ReadSerial defines for Arcturus
>
> Add the ReadSerial definitions for Arcturus to the arcturus_ppsmc.h header for
> use with unique_id
>
> Signed-off-by: Kent Russell <kent.russell@xxxxxxx>
> Change-Id: I71849ec381730b1803e54cd6040aa3b245b53de8
> ---
> drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 2 ++
> drivers/gpu/drm/amd/powerplay/inc/arcturus_ppsmc.h | 3 +++
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
> b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
> index 1c66b7d7139c..e98d92ec1eac 100644
> --- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
> @@ -128,6 +128,8 @@ static struct smu_11_0_cmn2aisc_mapping
> arcturus_message_map[SMU_MSG_MAX_COUNT]
> MSG_MAP(SetXgmiMode,
> PPSMC_MSG_SetXgmiMode),
> MSG_MAP(SetMemoryChannelEnable,
> PPSMC_MSG_SetMemoryChannelEnable),
> MSG_MAP(DFCstateControl,
> PPSMC_MSG_DFCstateControl),
> + MSG_MAP(ReadSerialNumTop32,
> PPSMC_MSG_ReadSerialNumTop32),
> + MSG_MAP(ReadSerialNumBottom32,
> PPSMC_MSG_ReadSerialNumBottom32),
> };
>
> static struct smu_11_0_cmn2aisc_mapping
> arcturus_clk_map[SMU_CLK_COUNT] = { diff --git
> a/drivers/gpu/drm/amd/powerplay/inc/arcturus_ppsmc.h
> b/drivers/gpu/drm/amd/powerplay/inc/arcturus_ppsmc.h
> index f736d773f9d6..b426be7c76c6 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/arcturus_ppsmc.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/arcturus_ppsmc.h
> @@ -116,6 +116,9 @@
> #define PPSMC_MSG_DFCstateControl 0x3B
> #define PPSMC_Message_Count 0x3C
>
> +#define PPSMC_MSG_ReadSerialNumTop32 0x49
> +#define PPSMC_MSG_ReadSerialNumBottom32 0x4A
> +
> typedef uint32_t PPSMC_Result;
> typedef uint32_t PPSMC_Msg;
> #pragma pack(pop)
> --
> 2.17.1
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