Reviewed-by: Evan Quan <evan.quan@xxxxxxx> > -----Original Message----- > From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Liu, > Shaoyun > Sent: 2019年2月16日 5:26 > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Liu, Shaoyun <Shaoyun.Liu@xxxxxxx> > Subject: [PATCH] drm/powerplay: Get fix clock info when dpm is disabled for > the clock > > When DPM for the specific clock is difabled, driver should still able to get fix > clock info from the pptable > > Change-Id: Ic609203b3b87aa75b0cfd57b57717b3bb89daf48 > Signed-off-by: shaoyunl <shaoyun.liu@xxxxxxx> > --- > drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 16 -------------- > -- > 1 file changed, 16 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c > index aad79aff..2eae0b4 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c > @@ -2641,10 +2641,6 @@ static int vega20_get_sclks(struct pp_hwmgr > *hwmgr, > struct vega20_single_dpm_table *dpm_table = &(data- > >dpm_table.gfx_table); > int i, count; > > - PP_ASSERT_WITH_CODE(data- > >smu_features[GNLD_DPM_GFXCLK].enabled, > - "[GetSclks]: gfxclk dpm not enabled!\n", > - return -EPERM); > - > count = (dpm_table->count > MAX_NUM_CLOCKS) ? > MAX_NUM_CLOCKS : dpm_table->count; > clocks->num_levels = count; > > @@ -2670,10 +2666,6 @@ static int vega20_get_memclocks(struct > pp_hwmgr *hwmgr, > struct vega20_single_dpm_table *dpm_table = &(data- > >dpm_table.mem_table); > int i, count; > > - PP_ASSERT_WITH_CODE(data- > >smu_features[GNLD_DPM_UCLK].enabled, > - "[GetMclks]: uclk dpm not enabled!\n", > - return -EPERM); > - > count = (dpm_table->count > MAX_NUM_CLOCKS) ? > MAX_NUM_CLOCKS : dpm_table->count; > clocks->num_levels = data->mclk_latency_table.count = count; > > @@ -2696,10 +2688,6 @@ static int vega20_get_dcefclocks(struct pp_hwmgr > *hwmgr, > struct vega20_single_dpm_table *dpm_table = &(data- > >dpm_table.dcef_table); > int i, count; > > - PP_ASSERT_WITH_CODE(data- > >smu_features[GNLD_DPM_DCEFCLK].enabled, > - "[GetDcfclocks]: dcefclk dpm not enabled!\n", > - return -EPERM); > - > count = (dpm_table->count > MAX_NUM_CLOCKS) ? > MAX_NUM_CLOCKS : dpm_table->count; > clocks->num_levels = count; > > @@ -2719,10 +2707,6 @@ static int vega20_get_socclocks(struct pp_hwmgr > *hwmgr, > struct vega20_single_dpm_table *dpm_table = &(data- > >dpm_table.soc_table); > int i, count; > > - PP_ASSERT_WITH_CODE(data- > >smu_features[GNLD_DPM_SOCCLK].enabled, > - "[GetSocclks]: socclk dpm not enabled!\n", > - return -EPERM); > - > count = (dpm_table->count > MAX_NUM_CLOCKS) ? > MAX_NUM_CLOCKS : dpm_table->count; > clocks->num_levels = count; > > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
