+ UMD guys Hi David Do you know if GC_USER_RB_BACKEND_DISABLE is still exist for gfx9/vega10 ? We found CC_RB_BACKEND_DISABLE was deprecated but looks it is still in use in kmd, so I want to check with you both of above registers Thanks /Monk From: amd-gfx [mailto:amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of Christian K?nig Sent: 2018å¹´3æ??7æ?¥ 20:26 To: Liu, Monk <Monk.Liu at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com> Cc: amd-gfx at lists.freedesktop.org Subject: Re: deprecated register issues Hi Monk, I honestly don't have the slightest idea why we are still accessing CC_RB_BACKEND_DISABLE. Maybe it still contains some useful values? Key point was that we needed to stop accessing it all the time to avoid triggering problems. Regards, Christian. Am 07.03.2018 um 13:11 schrieb Liu, Monk: Hi Christian I remember you and AlexD mentioned that a handful registers are deprecated for greenland (gfx9) e.g. CC_RB_BACKEND_DISABLE do you know why we still have this routine ? static u32 gfx_v9_0_get_rb_active_bitmap(struct amdgpu_device *adev) { u32 data, mask; data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE); data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE); data &= CC_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK; data >>= GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT; mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / adev->gfx.config.max_sh_per_se); return (~data) & mask; } see that it still read CC_RB_BACKEND_DISABLE thanks /Monk -------------- next part -------------- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20180307/0735bf9d/attachment-0001.html>