Hi Christian I remember you and AlexD mentioned that a handful registers are deprecated for greenland (gfx9) e.g. CC_RB_BACKEND_DISABLE do you know why we still have this routine ? static u32 gfx_v9_0_get_rb_active_bitmap(struct amdgpu_device *adev) { u32 data, mask; data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE); data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE); data &= CC_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK; data >>= GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT; mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / adev->gfx.config.max_sh_per_se); return (~data) & mask; } see that it still read CC_RB_BACKEND_DISABLE thanks /Monk -------------- next part -------------- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20180307/00893f81/attachment.html>