On Tue, Jan 16, 2018 at 7:02 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> when Over-driver engine clock and voltage were set,
> need to recalculate AVFS voltage on VI asics.
>
> Change-Id: If2a2226d64c0c2aa37c2e84f36b0dad8b7dee25e
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 80 ++++++++++++++--------
> drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h | 1 +
> 2 files changed, 53 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index a0007a8..c69749d 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -91,7 +91,6 @@ enum DPM_EVENT_SRC {
> DPM_EVENT_SRC_DIGITAL_OR_EXTERNAL = 4
> };
>
> -static int smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable);
> static const unsigned long PhwVIslands_Magic = (unsigned long)(PHM_VIslands_Magic);
> static int smu7_force_clock_level(struct pp_hwmgr *hwmgr,
> enum pp_clock_type type, uint32_t mask);
> @@ -1351,6 +1350,53 @@ static int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> +static int smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable)
> +{
> + struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
> +
> + if (smu_data == NULL)
> + return -EINVAL;
> +
> + if (smu_data->avfs.avfs_btc_status == AVFS_BTC_NOTSUPPORTED)
> + return 0;
> +
> + if (enable) {
> + if (!PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
> + CGS_IND_REG__SMC, FEATURE_STATUS, AVS_ON)) {
> + PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(
> + hwmgr, PPSMC_MSG_EnableAvfs),
> + "Failed to enable AVFS!",
> + return -EINVAL);
> + }
> + } else if (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
> + CGS_IND_REG__SMC, FEATURE_STATUS, AVS_ON)) {
> + PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(
> + hwmgr, PPSMC_MSG_DisableAvfs),
> + "Failed to disable AVFS!",
> + return -EINVAL);
> + }
> +
> + return 0;
> +}
> +
> +static int smu7_update_avfs(struct pp_hwmgr *hwmgr)
> +{
> + struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
> +
> + if (smu_data == NULL)
> + return -EINVAL;
> +
> + if (smu_data->avfs.avfs_btc_status == AVFS_BTC_NOTSUPPORTED)
> + return 0;
> +
> + if (smu_data->avfs.brecalculate_avfs) {
> + smu7_avfs_control(hwmgr, false);
> + smu7_avfs_control(hwmgr, true);
> + smu_data->avfs.brecalculate_avfs = true;
do we need to set brecalculate_avfs here? Won't it effectively be set
permanently at this point? When does the driver ever set
brecalculate_avfs to false?
Alex
> + }
> + return 0;
> +}
> +
> int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
> {
> int tmp_result, result = 0;
> @@ -3923,6 +3969,11 @@ static int smu7_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input)
> "Failed to populate and upload SCLK MCLK DPM levels!",
> result = tmp_result);
>
> + tmp_result = smu7_update_avfs(hwmgr);
> + PP_ASSERT_WITH_CODE((0 == tmp_result),
> + "Failed to update avfs voltages!",
> + result = tmp_result);
> +
> tmp_result = smu7_generate_dpm_level_enable_mask(hwmgr, input);
> PP_ASSERT_WITH_CODE((0 == tmp_result),
> "Failed to generate DPM level enabled mask!",
> @@ -4704,33 +4755,6 @@ static int smu7_set_power_profile_state(struct pp_hwmgr *hwmgr,
> return result;
> }
>
> -static int smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable)
> -{
> - struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
> -
> - if (smu_data == NULL)
> - return -EINVAL;
> -
> - if (smu_data->avfs.avfs_btc_status == AVFS_BTC_NOTSUPPORTED)
> - return 0;
> -
> - if (enable) {
> - if (!PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
> - CGS_IND_REG__SMC, FEATURE_STATUS, AVS_ON))
> - PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(
> - hwmgr, PPSMC_MSG_EnableAvfs),
> - "Failed to enable AVFS!",
> - return -EINVAL);
> - } else if (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
> - CGS_IND_REG__SMC, FEATURE_STATUS, AVS_ON))
> - PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(
> - hwmgr, PPSMC_MSG_DisableAvfs),
> - "Failed to disable AVFS!",
> - return -EINVAL);
> -
> - return 0;
> -}
> -
> static int smu7_notify_cac_buffer_info(struct pp_hwmgr *hwmgr,
> uint32_t virtual_addr_low,
> uint32_t virtual_addr_hi,
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h
> index c87263b..fd9ed20 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h
> @@ -40,6 +40,7 @@ struct smu7_buffer_entry {
> struct smu7_avfs {
> enum AVFS_BTC_STATUS avfs_btc_status;
> uint32_t avfs_btc_param;
> + bool brecalculate_avfs;
> };
>
> struct smu7_smumgr {
> --
> 1.9.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
