Add odn_edit_dpm_table function points for setting user assigned clock/voltage. Change-Id: I7e49ffdc30b77d07b46bf12ebb275fa0ff901588 Signed-off-by: Rex Zhu <Rex.Zhu at amd.com> --- drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 6 ++++++ drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h index d6772a8..97d25cd 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h @@ -364,6 +364,12 @@ struct phm_odn_performance_level { bool enabled; }; +enum PHM_ODN_DPM_TABLE_TYPE { + PHM_ODN_SCLK_VDDC_TABLE, + PHM_ODN_MCLK_VDDC_TABLE, + PHM_ODN_RESET_DEFAULT_TABLE +}; + struct phm_odn_clock_levels { uint32_t size; uint32_t options; diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index c496742..36e5378 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h @@ -345,6 +345,9 @@ struct pp_hwmgr_func { struct PP_TemperatureRange *range); int (*get_power_profile_mode)(struct pp_hwmgr *hwmgr, char *buf); int (*set_power_profile_mode)(struct pp_hwmgr *hwmgr, long *input, uint32_t size); + int (*odn_edit_dpm_table)(struct pp_hwmgr *hwmgr, + enum PHM_ODN_DPM_TABLE_TYPE type, + long *input, uint32_t size); }; struct pp_table_func { -- 1.9.1