[PATCH] drm/amd/powerplay: use ffs/fls instead of implementing our own

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On Tue, Jan 2, 2018 at 10:24 PM, Evan Quan <evan.quan at amd.com> wrote:
> Change-Id: I2683296f7b08cc637ed54b0b4b7db03b8818e658
> Signed-off-by: Evan Quan <evan.quan at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 27 ++++------------------
>  1 file changed, 4 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index ed16468..54728b6 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -4488,7 +4488,6 @@ static int vega10_force_clock_level(struct pp_hwmgr *hwmgr,
>                 enum pp_clock_type type, uint32_t mask)
>  {
>         struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
> -       int i;
>
>         if (hwmgr->request_dpm_level & (AMD_DPM_FORCED_LEVEL_AUTO |
>                                 AMD_DPM_FORCED_LEVEL_LOW |
> @@ -4497,17 +4496,8 @@ static int vega10_force_clock_level(struct pp_hwmgr *hwmgr,
>
>         switch (type) {
>         case PP_SCLK:
> -               for (i = 0; i < 32; i++) {
> -                       if (mask & (1 << i))
> -                               break;
> -               }
> -               data->smc_state_table.gfx_boot_level = i;
> -
> -               for (i = 31; i >= 0; i--) {
> -                       if (mask & (1 << i))
> -                               break;
> -               }
> -               data->smc_state_table.gfx_max_level = i;
> +               data->smc_state_table.gfx_boot_level = mask ? (ffs(mask) - 1) : 0;
> +               data->smc_state_table.gfx_max_level = mask ? (fls(mask) - 1) : 0;
>
>                 PP_ASSERT_WITH_CODE(!vega10_upload_dpm_bootup_level(hwmgr),
>                         "Failed to upload boot level to lowest!",
> @@ -4519,17 +4509,8 @@ static int vega10_force_clock_level(struct pp_hwmgr *hwmgr,
>                 break;
>
>         case PP_MCLK:
> -               for (i = 0; i < 32; i++) {
> -                       if (mask & (1 << i))
> -                               break;
> -               }
> -               data->smc_state_table.mem_boot_level = i;
> -
> -               for (i = 31; i >= 0; i--) {
> -                       if (mask & (1 << i))
> -                               break;
> -               }
> -               data->smc_state_table.mem_max_level = i;
> +               data->smc_state_table.mem_boot_level = mask ? (ffs(mask) - 1) : 0;
> +               data->smc_state_table.mem_max_level = mask ? (fls(mask) - 1) : 0;
>
>                 PP_ASSERT_WITH_CODE(!vega10_upload_dpm_bootup_level(hwmgr),
>                         "Failed to upload boot level to lowest!",
> --
> 2.7.4
>
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> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


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