[PATCH 0/9][drm-next] Add uvd6.3 HEVC encode feature in amdgpu

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Hi Christian, leo,

Thanks for comments. I will correct them accordingly.

Best Regards!

James Zhu


On 2017-10-02 11:59 AM, Leo Liu wrote:
>
>
> On 10/02/2017 11:56 AM, Christian König wrote:
>> Some minor nit picks on patch #4 and #9, but apart from that it looks 
>> good to me.
>>
>> With those fixed the series is Reviewed-by: Christian König 
>> <christian.koenig at amd.com>, but Leo should probably take a look as well.
>
> Yes. I did.
>
> With Christian's comments fixed. The series is
>
> Reviewed-and-Tested-by: Leo Liu <leo.liu at amd.com>
>
>>
>> BTW: What command did you use to send those mails? The subject lines 
>> look a bit odd.
>>
>> Regards,
>> Christian.
>>
>> Am 02.10.2017 um 16:13 schrieb James Zhu:
>>> These patches add headers/rings/test_cases/IRQs to support uvd6.3 HEVC
>>> encode in amdgpu
>>>   Signed-off-by: James Zhu <James.Zhu at amd.com>
>>> ---
>>> James Zhu (9):
>>>    drm/amdgpu: add uvd enc registers in header
>>>    drm/amdgpu: add uvd enc command in header
>>>    drm/amdgpu: add new uvd enc ring methods
>>>    drm/amdgpu: add uvd enc rings
>>>    drm/amdgpu: add uvd enc into run queue
>>>    drm/amdgpu: add uvd enc vm functions
>>>    drm/amdgpu: add uvd enc ring test
>>>    drm/amdgpu: add uvd enc ib test
>>>    drm/amdgpu: add uvd enc irq
>>>
>>>   drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c              | 485 
>>> ++++++++++++++++++++-
>>>   drivers/gpu/drm/amd/amdgpu/vid.h                   |  10 +
>>>   .../gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h   |  15 +
>>>   3 files changed, 504 insertions(+), 6 deletions(-)
>>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>



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