These patches add headers/rings/test_cases/IRQs to support uvd6.3 HEVC encode in amdgpu Signed-off-by: James Zhu <James.Zhu at amd.com> --- James Zhu (9): drm/amdgpu: add uvd enc registers in header drm/amdgpu: add uvd enc command in header drm/amdgpu: add new uvd enc ring methods drm/amdgpu: add uvd enc rings drm/amdgpu: add uvd enc into run queue drm/amdgpu: add uvd enc vm functions drm/amdgpu: add uvd enc ring test drm/amdgpu: add uvd enc ib test drm/amdgpu: add uvd enc irq drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 485 ++++++++++++++++++++- drivers/gpu/drm/amd/amdgpu/vid.h | 10 + .../gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h | 15 + 3 files changed, 504 insertions(+), 6 deletions(-) -- 2.7.4
