[9/9] drm/amdgpu: add uvd enc irq

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Am 02.10.2017 um 16:13 schrieb James Zhu:
> Add UVD encode IRQ handle and enable the UVD encode trap
>
> Signed-off-by: James Zhu <James.Zhu at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 40 +++++++++++++++++++++++++++++++++--
>   1 file changed, 38 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> index 589f025..c8de722 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> @@ -383,6 +383,15 @@ static int uvd_v6_0_sw_init(void *handle)
>   	if (r)
>   		return r;
>   
> +	/* UVD ENC TRAP */
> +	if (uvd_v6_0_enc_support(adev)) {
> +		for (i = 0; i < adev->uvd.num_enc_rings; ++i) {
> +			r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i + 119, &adev->uvd.irq);
> +			if (r)
> +				return r;
> +		}
> +	}
> +
>   	r = amdgpu_uvd_sw_init(adev);
>   	if (r)
>   		return r;
> @@ -1225,8 +1234,31 @@ static int uvd_v6_0_process_interrupt(struct amdgpu_device *adev,
>   				      struct amdgpu_irq_src *source,
>   				      struct amdgpu_iv_entry *entry)
>   {
> +	bool int_handled = true;
>   	DRM_DEBUG("IH: UVD TRAP\n");
> -	amdgpu_fence_process(&adev->uvd.ring);
> +
> +	switch (entry->src_id) {
> +		case 124:

The "case" statement should have the same indentation as the "switch" 
statement.

Regards,
Christian.

> +			amdgpu_fence_process(&adev->uvd.ring);
> +			break;
> +		case 119:
> +			if (uvd_v6_0_enc_support(adev))
> +				amdgpu_fence_process(&adev->uvd.ring_enc[0]);
> +			else
> +				int_handled = false;
> +			break;
> +		case 120:
> +			if (uvd_v6_0_enc_support(adev))
> +				amdgpu_fence_process(&adev->uvd.ring_enc[1]);
> +			else
> +				int_handled = false;
> +			break;
> +	}
> +
> +	if (false == int_handled)
> +			DRM_ERROR("Unhandled interrupt: %d %d\n",
> +			  entry->src_id, entry->src_data[0]);
> +
>   	return 0;
>   }
>   
> @@ -1608,7 +1640,11 @@ static const struct amdgpu_irq_src_funcs uvd_v6_0_irq_funcs = {
>   
>   static void uvd_v6_0_set_irq_funcs(struct amdgpu_device *adev)
>   {
> -	adev->uvd.irq.num_types = 1;
> +	if (uvd_v6_0_enc_support(adev))
> +		adev->uvd.irq.num_types = adev->uvd.num_enc_rings + 1;
> +	else
> +		adev->uvd.irq.num_types = 1;
> +
>   	adev->uvd.irq.funcs = &uvd_v6_0_irq_funcs;
>   }
>   




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