Re: [PATCH v2 1/7] drm/amdgpu: Add mqd for userq compute queue

[Christian König <ckoenig.leichtzumerken@xxxxxxxxx>]

Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam:
> Add mqd for userq compute queue for gfx11/gfx12
>
> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@xxxxxxx>

Acked-by: Christian König <christian.koenig@xxxxxxx>

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c    | 4 ++++
>   drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c    | 4 ++++
>   drivers/gpu/drm/amd/include/v11_structs.h | 4 ++--
>   drivers/gpu/drm/amd/include/v12_structs.h | 4 ++--
>   4 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index 67cd42031571..b9a672c51cba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -4255,6 +4255,10 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
>   
>   	mqd->cp_hqd_active = prop->hqd_active;
>   
> +	/* set UQ fenceaddress */
> +	mqd->fence_address_lo = lower_32_bits(prop->fence_address);
> +	mqd->fence_address_hi = upper_32_bits(prop->fence_address);
> +
>   	return 0;
>   }
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> index d0697b0869e3..8c0a4f3a4914 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> @@ -3177,6 +3177,10 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
>   
>   	mqd->cp_hqd_active = prop->hqd_active;
>   
> +	/* set UQ fenceaddress */
> +	mqd->fence_address_lo = lower_32_bits(prop->fence_address);
> +	mqd->fence_address_hi = upper_32_bits(prop->fence_address);
> +
>   	return 0;
>   }
>   
> diff --git a/drivers/gpu/drm/amd/include/v11_structs.h b/drivers/gpu/drm/amd/include/v11_structs.h
> index f6d4dab849eb..3728389fc3be 100644
> --- a/drivers/gpu/drm/amd/include/v11_structs.h
> +++ b/drivers/gpu/drm/amd/include/v11_structs.h
> @@ -1118,8 +1118,8 @@ struct v11_compute_mqd {
>   	uint32_t reserved_443; // offset: 443  (0x1BB)
>   	uint32_t reserved_444; // offset: 444  (0x1BC)
>   	uint32_t reserved_445; // offset: 445  (0x1BD)
> -	uint32_t reserved_446; // offset: 446  (0x1BE)
> -	uint32_t reserved_447; // offset: 447  (0x1BF)
> +	uint32_t fence_address_lo; // offset: 446  (0x1BE)
> +	uint32_t fence_address_hi; // offset: 447  (0x1BF)
>   	uint32_t gws_0_val; // offset: 448  (0x1C0)
>   	uint32_t gws_1_val; // offset: 449  (0x1C1)
>   	uint32_t gws_2_val; // offset: 450  (0x1C2)
> diff --git a/drivers/gpu/drm/amd/include/v12_structs.h b/drivers/gpu/drm/amd/include/v12_structs.h
> index 5787c8a51b7c..03a35f8a65b0 100644
> --- a/drivers/gpu/drm/amd/include/v12_structs.h
> +++ b/drivers/gpu/drm/amd/include/v12_structs.h
> @@ -1118,8 +1118,8 @@ struct v12_compute_mqd {
>       uint32_t reserved_443; // offset: 443  (0x1BB)
>       uint32_t reserved_444; // offset: 444  (0x1BC)
>       uint32_t reserved_445; // offset: 445  (0x1BD)
> -    uint32_t reserved_446; // offset: 446  (0x1BE)
> -    uint32_t reserved_447; // offset: 447  (0x1BF)
> +    uint32_t fence_address_lo; // offset: 446  (0x1BE)
> +    uint32_t fence_address_hi; // offset: 447  (0x1BF)
>       uint32_t gws_0_val; // offset: 448  (0x1C0)
>       uint32_t gws_1_val; // offset: 449  (0x1C1)
>       uint32_t gws_2_val; // offset: 450  (0x1C2)