On Tue, Jun 13, 2017 at 1:17 AM, Mario Kleiner
<mario.kleiner.de at gmail.com> wrote:
> Commit e6b9a6c84b93
> ("drm/radeon: Make display watermark calculations more accurate")
> made watermark calculations more accurate, but not for > 4k
> resolutions on 32-Bit architectures, as it introduced an integer
> overflow for those setups and resolutions.
>
> Fix this by proper u64 casting and division.
>
> Signed-off-by: Mario Kleiner <mario.kleiner.de at gmail.com>
> Reported-by: Ben Hutchings <ben.hutchings at codethink.co.uk>
> Fixes: e6b9a6c84b93 ("drm/radeon: Make display watermark calculations more accurate")
> Cc: Ben Hutchings <ben.hutchings at codethink.co.uk>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Cc: stable at vger.kernel.org
Applied the series. Thanks!
Alex
> ---
> drivers/gpu/drm/radeon/cik.c | 7 +++++--
> drivers/gpu/drm/radeon/evergreen.c | 7 +++++--
> drivers/gpu/drm/radeon/si.c | 7 +++++--
> 3 files changed, 15 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 2589121..667c21a 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -9267,8 +9267,11 @@ static void dce8_program_watermarks(struct radeon_device *rdev,
> u32 tmp, wm_mask;
>
> if (radeon_crtc->base.enabled && num_heads && mode) {
> - active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
> - line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
> + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
> + (u32)mode->clock);
> + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
> + (u32)mode->clock);
> + line_time = min(line_time, (u32)65535);
>
> /* watermark for high clocks */
> if ((rdev->pm.pm_method == PM_METHOD_DPM) &&
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index 0bf1035..5346372 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -2266,8 +2266,11 @@ static void evergreen_program_watermarks(struct radeon_device *rdev,
> fixed20_12 a, b, c;
>
> if (radeon_crtc->base.enabled && num_heads && mode) {
> - active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
> - line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
> + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
> + (u32)mode->clock);
> + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
> + (u32)mode->clock);
> + line_time = min(line_time, (u32)65535);
> priority_a_cnt = 0;
> priority_b_cnt = 0;
> dram_channels = evergreen_get_number_of_dram_channels(rdev);
> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
> index 76d1888..5303f25 100644
> --- a/drivers/gpu/drm/radeon/si.c
> +++ b/drivers/gpu/drm/radeon/si.c
> @@ -2284,8 +2284,11 @@ static void dce6_program_watermarks(struct radeon_device *rdev,
> fixed20_12 a, b, c;
>
> if (radeon_crtc->base.enabled && num_heads && mode) {
> - active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
> - line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
> + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
> + (u32)mode->clock);
> + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
> + (u32)mode->clock);
> + line_time = min(line_time, (u32)65535);
> priority_a_cnt = 0;
> priority_b_cnt = 0;
>
> --
> 2.7.4
>
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