With this change we can do things like this update file:
add reg carrizo.smu80.ixSMUSVI_NB_CURRENTVID smc 0xD8230044
add bit carrizo.smu80.ixSMUSVI_NB_CURRENTVID.CURRENT_NB_VID 24 31
add reg carrizo.smu80.ixSMUSVI_GFX_CURRENTVID smc 0xD8230048
add bit carrizo.smu80.ixSMUSVI_GFX_CURRENTVID.CURRENT_GFX_VID 24 31
Which allows us to read powerplay voltage sensors:
smu80.ixSMUSVI_NB_CURRENTVID => 0x6d000000
.CURRENT_NB_VID[24:31] == 109 (0x0000006d)
smu80.ixSMUSVI_GFX_CURRENTVID => 0x69000000
.CURRENT_GFX_VID[24:31] == 105 (0x00000069)
Which correspond to 3.475V NB voltage for instance...
Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
---
doc/umr.1 | 9 +++++++--
src/app/main.c | 4 ++--
src/lib/update.c | 18 ++++++++++++++----
3 files changed, 23 insertions(+), 8 deletions(-)
diff --git a/doc/umr.1 b/doc/umr.1
index 5c4bd015b7c9..03da92d4f34d 100644
--- a/doc/umr.1
+++ b/doc/umr.1
@@ -1,4 +1,4 @@
-.TH UMR 1 "January 2017" "AMD (c) 2017" "User Manuals"
+.TH UMR 1 "June 2017" "AMD (c) 2017" "User Manuals"
.SH NAME
umr \- AMDGPU Userspace Register Debugger
.SH DESCRIPTION
@@ -90,9 +90,14 @@ Read 'size' bytes (in hex) from the address specified (in hexadecimal) from VRAM
to stdout. Optionally specify the VMID (in decimal) treating the address as a
virtual address instead. Can use 'use_pci' to directly access VRAM.
+.IP "--update, -u" <filename>
+Specify update file to add, change, or delete registers from the register
+database. Useful for adding registers that are not including in the kernel headers.
+
.IP "--option, -O <string>[,<string>,...]"
Specify options to the tool. Multiple options can be specified as comma
-separated strings.
+separated strings. Options should be specified before --update or --force commands
+(among others) to enable options specified.
.B quiet
Disable various informative but not required (for functionality) outputs.
diff --git a/src/app/main.c b/src/app/main.c
index 1d9ef9edceb8..60bf20480fd3 100644
--- a/src/app/main.c
+++ b/src/app/main.c
@@ -223,7 +223,7 @@ int main(int argc, char **argv)
if (!asic)
asic = get_asic();
- if (sscanf(argv[i+1], "%"SCNx32, ®) == 1 && sscanf(argv[i+2], "%"SCNx32, &val) == 1)
+ if (!memcmp(argv[i+1], "0x", 2) && sscanf(argv[i+1], "%"SCNx32, ®) == 1 && sscanf(argv[i+2], "%"SCNx32, &val) == 1)
umr_write_reg(asic, reg, val);
else
umr_set_register(asic, argv[i+1], argv[i+2]);
@@ -270,7 +270,7 @@ int main(int argc, char **argv)
if (!asic)
asic = get_asic();
- if (sscanf(argv[i+1], "%"SCNx32, ®) == 1) {
+ if (!memcmp(argv[i+1], "0x", 2) && sscanf(argv[i+1], "%"SCNx32, ®) == 1) {
reg = umr_read_reg(asic, reg);
printf("0x%08lx\n", (unsigned long)reg);
} else {
diff --git a/src/lib/update.c b/src/lib/update.c
index 6106f4d15cce..bbb218282734 100644
--- a/src/lib/update.c
+++ b/src/lib/update.c
@@ -132,12 +132,21 @@ static void find_bit(struct umr_asic *as, char *ip, char *reg, char *bit, int *i
static int do_add_reg(char **ptr, struct umr_asic *as)
{
char asic[BUFLEN], ip[BUFLEN],
- reg[BUFLEN], addr[BUFLEN];
- int i, j;
+ reg[BUFLEN], addr[BUFLEN], type[BUFLEN];
+ int i, j, mtype = REG_MMIO;
struct umr_reg newreg;
parse_regpath(ptr, asic, ip, reg);
- consume_str(ptr, addr);
+ consume_str(ptr, type);
+ if (!strcmp(type, "pci") || !strcmp(type, "smc")) {
+ consume_str(ptr, addr);
+ if (!strcmp(type, "pci"))
+ mtype = REG_PCIE;
+ else
+ mtype = REG_SMC;
+ } else {
+ strcpy(addr, type);
+ }
// now try to find that asic/ip block
if (strcmp(as->asicname, asic)) {
@@ -156,7 +165,7 @@ static int do_add_reg(char **ptr, struct umr_asic *as)
memset(&newreg, 0, sizeof(newreg));
newreg.regname = calloc(1, strlen(reg)+1);
strcpy(newreg.regname, reg);
- newreg.type = REG_MMIO;
+ newreg.type = mtype;
sscanf(addr, "%"SCNx32, &newreg.addr);
// extend array
@@ -199,6 +208,7 @@ static int do_add_bit(char **ptr, struct umr_asic *as)
sscanf(stop, "%"SCNu32, &nstop);
newbit.start = nstart;
newbit.stop = nstop;
+ newbit.bitfield_print = umr_bitfield_default;
// extend bits
if (as->blocks[i]->regs[j].no_bits == 0) {
--
2.12.0
