On Fri, Sep 30, 2016 at 9:19 AM, Deucher, Alexander <Alexander.Deucher at amd.com> wrote: >> -----Original Message----- >> From: Deng, Emily >> Sent: Friday, September 30, 2016 3:21 AM >> To: Alex Deucher; amd-gfx at lists.freedesktop.org >> Cc: Deucher, Alexander >> Subject: RE: [PATCH 3/4] drm/amdgpu/dce6: add dce_v6_0_disable_dce >> >> Hi Alex, >> It seems hasn't support virtual display for dce_v6_0 asic? > > SI support was developed in parallel and landed after your virtual dce patches went in. Ping on this series. Alex > > Alex > >> >> > -----Original Message----- >> > From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf >> > Of Alex Deucher >> > Sent: Friday, September 30, 2016 12:14 PM >> > To: amd-gfx at lists.freedesktop.org >> > Cc: Deucher, Alexander <Alexander.Deucher at amd.com> >> > Subject: [PATCH 3/4] drm/amdgpu/dce6: add dce_v6_0_disable_dce >> > >> > Needed for virtual dce support >> > >> > Signed-off-by: Alex Deucher <alexander.deucher at amd.com> >> > --- >> > drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 50 >> > ++++++++++++++++++++++++++++++++--- >> > drivers/gpu/drm/amd/amdgpu/dce_v6_0.h | 2 ++ >> > 2 files changed, 48 insertions(+), 4 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c >> > b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c >> > index 0a6e3b1..502e979 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c >> > +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c >> > @@ -490,12 +490,55 @@ static void dce_v6_0_resume_mc_access(struct >> > amdgpu_device *adev, static void dce_v6_0_set_vga_render_state(struct >> > amdgpu_device *adev, >> > bool render) >> > { >> > - if (!render) >> > + if (!render) >> > WREG32(R_000300_VGA_RENDER_CONTROL, >> > RREG32(R_000300_VGA_RENDER_CONTROL) & >> > C_000300_VGA_VSTATUS_CNTL); >> > >> > } >> > >> > +static int dce_v6_0_get_num_crtc(struct amdgpu_device *adev) { >> > + int num_crtc = 0; >> > + >> > + switch (adev->asic_type) { >> > + case CHIP_TAHITI: >> > + case CHIP_PITCAIRN: >> > + case CHIP_VERDE: >> > + num_crtc = 6; >> > + break; >> > + case CHIP_OLAND: >> > + num_crtc = 2; >> > + break; >> > + default: >> > + num_crtc = 0; >> > + } >> > + return num_crtc; >> > +} >> > + >> > +void dce_v6_0_disable_dce(struct amdgpu_device *adev) { >> > + /*Disable VGA render and enabled crtc, if has DCE engine*/ >> > + if (amdgpu_atombios_has_dce_engine_info(adev)) { >> > + u32 tmp; >> > + int crtc_enabled, i; >> > + >> > + dce_v6_0_set_vga_render_state(adev, false); >> > + >> > + /*Disable crtc*/ >> > + for (i = 0; i < dce_v6_0_get_num_crtc(adev); i++) { >> > + crtc_enabled = >> > RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & >> > + EVERGREEN_CRTC_MASTER_EN; >> > + if (crtc_enabled) { >> > + WREG32(EVERGREEN_CRTC_UPDATE_LOCK >> > + crtc_offsets[i], 1); >> > + tmp = RREG32(EVERGREEN_CRTC_CONTROL >> > + crtc_offsets[i]); >> > + tmp &= ~EVERGREEN_CRTC_MASTER_EN; >> > + WREG32(EVERGREEN_CRTC_CONTROL + >> > crtc_offsets[i], tmp); >> > + WREG32(EVERGREEN_CRTC_UPDATE_LOCK >> > + crtc_offsets[i], 0); >> > + } >> > + } >> > + } >> > +} >> > + >> > static void dce_v6_0_program_fmt(struct drm_encoder *encoder) { >> > >> > @@ -2217,21 +2260,20 @@ static int dce_v6_0_early_init(void *handle) >> > dce_v6_0_set_display_funcs(adev); >> > dce_v6_0_set_irq_funcs(adev); >> > >> > + adev->mode_info.num_crtc = dce_v6_0_get_num_crtc(adev); >> > + >> > switch (adev->asic_type) { >> > case CHIP_TAHITI: >> > case CHIP_PITCAIRN: >> > case CHIP_VERDE: >> > - adev->mode_info.num_crtc = 6; >> > adev->mode_info.num_hpd = 6; >> > adev->mode_info.num_dig = 6; >> > break; >> > case CHIP_OLAND: >> > - adev->mode_info.num_crtc = 2; >> > adev->mode_info.num_hpd = 2; >> > adev->mode_info.num_dig = 2; >> > break; >> > default: >> > - /* FIXME: not supported yet */ >> > return -EINVAL; >> > } >> > >> > diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.h >> > b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.h >> > index 6a55281..4c6cd18 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.h >> > +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.h >> > @@ -26,4 +26,6 @@ >> > >> > extern const struct amd_ip_funcs dce_v6_0_ip_funcs; >> > >> > +void dce_v6_0_disable_dce(struct amdgpu_device *adev); >> > + >> > #endif >> > -- >> > 2.5.5 >> > >> > _______________________________________________ >> > amd-gfx mailing list >> > amd-gfx at lists.freedesktop.org >> > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
