On Tue, Sep 24, 2019 at 01:48:38PM +0200, Marek Szyprowski wrote: > From: Maciej Falkowski <m.falkowski@xxxxxxxxxxx> > > To increase macro readability added descriptions > to clocks macros. > > Signed-off-by: Maciej Falkowski <m.falkowski@xxxxxxxxxxx> > Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx> > --- > include/dt-bindings/sound/samsung-i2s.h | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/include/dt-bindings/sound/samsung-i2s.h b/include/dt-bindings/sound/samsung-i2s.h > index 77545f14c379..fd752475c762 100644 > --- a/include/dt-bindings/sound/samsung-i2s.h > +++ b/include/dt-bindings/sound/samsung-i2s.h > @@ -2,8 +2,13 @@ > #ifndef _DT_BINDINGS_SAMSUNG_I2S_H > #define _DT_BINDINGS_SAMSUNG_I2S_H > > -#define CLK_I2S_CDCLK 0 > -#define CLK_I2S_RCLK_SRC 1 > -#define CLK_I2S_RCLK_PSR 2 > +/* the CDCLK (CODECLKO) gate clock */ > +#define CLK_I2S_CDCLK 0 I do not find it more readable because of removal of indent after define name. Also the description is not accurate - you documented, not increased readability. Best regards, Krzysztof > + > +/* the RCLKSRC mux clock (corresponding to RCLKSRC bit in IISMOD register) */ > +#define CLK_I2S_RCLK_SRC 1 > + > +/* the RCLK prescaler divider clock (corresponding to the IISPSR register) */ > +#define CLK_I2S_RCLK_PSR 2 > > #endif /* _DT_BINDINGS_SAMSUNG_I2S_H */ > -- > 2.17.1 > > > _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
