On Fri, Aug 6, 2010 at 9:32 AM, Seungwhan Youn <sw.youn@xxxxxxxxxxx> wrote:
> This patch adds to support Master Mode LRCLK, BCLK rates
> setting for wm8580.
>
> Signed-off-by: Seungwhan Youn <sw.youn@xxxxxxxxxxx>
> ---
> sound/soc/codecs/wm8580.c | 51 +++++++++++++++++++++++++++++++++++++++++++++
> sound/soc/codecs/wm8580.h | 2 +
> 2 files changed, 53 insertions(+), 0 deletions(-)
>
> diff --git a/sound/soc/codecs/wm8580.c b/sound/soc/codecs/wm8580.c
> index d282eb3..a2bb2a4 100644
> --- a/sound/soc/codecs/wm8580.c
> +++ b/sound/soc/codecs/wm8580.c
> @@ -705,6 +705,57 @@ static int wm8580_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
> snd_soc_write(codec, WM8580_CLKSEL, reg);
> break;
>
> + case WM8580_LRCLK_RATE:
> + reg = snd_soc_read(codec, WM8580_PAIF1 + codec_dai->id);
> + reg &= ~WM8580_AIF_RATE_MASK;
> + switch (div) {
> + case 128:
> + reg |= WM8580_AIF_RATE_128;
> + break;
> + case 192:
> + reg |= WM8580_AIF_RATE_192;
> + break;
> + case 256:
> + reg |= WM8580_AIF_RATE_256;
> + break;
> + case 384:
> + reg |= WM8580_AIF_RATE_384;
> + break;
> + case 512:
> + reg |= WM8580_AIF_RATE_512;
> + break;
> + case 768:
> + reg |= WM8580_AIF_RATE_768;
> + break;
> + case 1152:
> + reg |= WM8580_AIF_RATE_1152;
> + break;
> + default:
> + return -EINVAL;
> + }
> + snd_soc_write(codec, WM8580_PAIF1 + codec_dai->id, reg);
> + break;
> +
> + case WM8580_BCLK_RATE:
> + reg = snd_soc_read(codec, WM8580_PAIF1 + codec_dai->id);
> + reg &= ~WM8580_AIF_BCLKSEL_MASK;
> + switch (div) {
> + case 64:
> + reg |= WM8580_AIF_BCLKSEL_64;
> + break;
> + case 32:
> + reg |= WM8580_AIF_BCLKSEL_32;
> + break;
> + case 16:
> + reg |= WM8580_AIF_BCLKSEL_16;
> + break;
> + default:
> + reg |= WM8580_AIF_BCLKSEL_SYSCLK;
> + break;
> + }
> + snd_soc_write(codec, WM8580_PAIF1 + codec_dai->id, reg);
> + break;
> +
> default:
> return -EINVAL;
> }
> diff --git a/sound/soc/codecs/wm8580.h b/sound/soc/codecs/wm8580.h
> index aeb65ef..2272e36 100644
> --- a/sound/soc/codecs/wm8580.h
> +++ b/sound/soc/codecs/wm8580.h
> @@ -22,6 +22,8 @@
> #define WM8580_DAC_CLKSEL 2
> #define WM8580_ADC_CLKSEL 3
> #define WM8580_CLKOUTSRC 4
> +#define WM8580_LRCLK_RATE 5
> +#define WM8580_BCLK_RATE 6
>
> #define WM8580_CLKSRC_MCLK 1
> #define WM8580_CLKSRC_ADCMCLK 2
Again.... http://mailman.alsa-project.org/pipermail/alsa-devel/2009-September/021005.html
Also IMO, WM8580_MCLKRATIO and WM8580_BCLKRATIO sound better
than WM8580_LRCLK_RATE and WM8580_BCLK_RATE resp. That is if they
are to be accepted.
_______________________________________________
Alsa-devel mailing list
Alsa-devel@xxxxxxxxxxxxxxxx
http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
