Mark Brown wrote: > On Mon, Jul 06, 2009 at 03:01:54PM -0700, Troy Kisky wrote: > >> But even if the cpu is the clock/frame master, the sample rate generator has an 8 bit >> divider field, which seems to be always 0 in the current code. And I don't see any reference >> to params_rate in the davinci-i2s.c file. Has anyone tried the cpu as master??? > > It does appear that way, doesn't it? But looking at the code > davinci-sffsdr runs with the CPU as frame master so I'd have expected > that it would have shown any problems here. > But in this case the clock to divide would come from the CLKR pin, so a divide by (0+1) would be correct. _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
