On Tue, May 28, 2024 at 11:15 PM Rob Herring <robh@xxxxxxxxxx> wrote: > > On Tue, May 21, 2024 at 06:13:35PM +0800, Shengjiu Wang wrote: > > Add compatible string "fsl,imx95-xcvr" for i.MX95 platform. > > > > The difference between each platform is in below table. > > > > +---------+--------+----------+--------+ > > | SOC | PHY | eARC/ARC | SPDIF | > > +---------+--------+----------+--------+ > > | i.MX8MP | V1 | Yes | Yes | > > +---------+--------+----------+--------+ > > | i.MX93 | N/A | N/A | Yes | > > +---------+--------+----------+--------+ > > | i.MX95 | V2 | N/A | Yes | > > +---------+--------+----------+--------+ > > > > On i.MX95, there are two PLL clock sources, they are the parent > > clocks of the XCVR root clock. one is for 8kHz series rates, named > > as 'pll8k', another one is for 11kHz series rates, named as 'pll11k'. > > They are optional clocks, if there are such clocks, then the driver > > can switch between them to support more accurate sample rates. > > > > As 'pll8k' and 'pll11k' are optional, then add 'minItems: 4' for > > clocks and clock-names properties. > > > > On i.MX95, the 'interrupts' configuration has the same constraint > > as i.MX93. > > > > Only on i.MX8MP, the 'resets' is required, but for i.MX95 and i.MX93 > > there is no such hardware setting. > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx> > > --- > > .../devicetree/bindings/sound/fsl,xcvr.yaml | 37 ++++++++++++++++++- > > 1 file changed, 36 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml > > index 0eb0c1ba8710..d1dcc27655eb 100644 > > --- a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml > > +++ b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml > > @@ -22,6 +22,7 @@ properties: > > enum: > > - fsl,imx8mp-xcvr > > - fsl,imx93-xcvr > > + - fsl,imx95-xcvr > > > > reg: > > items: > > @@ -49,6 +50,9 @@ properties: > > - description: PHY clock > > - description: SPBA clock > > - description: PLL clock > > + - description: PLL clock source for 8kHz series > > + - description: PLL clock source for 11kHz series > > + minItems: 4 > > > > clock-names: > > items: > > @@ -56,6 +60,9 @@ properties: > > - const: phy > > - const: spba > > - const: pll_ipg > > + - const: pll8k > > + - const: pll11k > > + minItems: 4 > > > > dmas: > > items: > > @@ -79,15 +86,24 @@ required: > > - clock-names > > - dmas > > - dma-names > > - - resets > > > > allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: fsl,imx8mp-xcvr > > + then: > > + required: > > + - resets > > + > > - if: > > properties: > > compatible: > > contains: > > enum: > > - fsl,imx93-xcvr > > + - fsl,imx95-xcvr > > then: > > properties: > > interrupts: > > @@ -98,6 +114,25 @@ allOf: > > interrupts: > > maxItems: 1 > > > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - fsl,imx95-xcvr > > + then: > > + properties: > > + clocks: > > + maxItems: 6 > > + clock-names: > > + maxItems: 6 > > 6 is already the max. Drop these and add a 'not' into the if schema (or > list out the other compatibles). Ok, will update it. best regards Shengjiu Wang > > > + else: > > + properties: > > + clocks: > > + maxItems: 4 > > + clock-names: > > + maxItems: 4 > > + > > additionalProperties: false > > > > examples: > > -- > > 2.34.1 > >
