On Wed, 31 May 2023 14:30:19 +0800, Walker Chen wrote:
> On 2023/5/31 14:23, Hal Feng wrote:
>> On Fri, 26 May 2023 22:54:02 +0800, Walker Chen wrote:
>>> Add the tdm controller node and pins configuration of tdm for the
>>> StarFive JH7110 SoC.
>>>
>>> Signed-off-by: Walker Chen <walker.chen@xxxxxxxxxxxxxxxx>
>>> ---
>>> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
>>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
>>> 2 files changed, 61 insertions(+)
>>>
>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> index 1155b97b593d..19b5954ee72d 100644
>>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> @@ -214,6 +214,40 @@
>>> slew-rate = <0>;
>>> };
>>> };
>>> +
>>> + tdm0_pins: tdm0-pins {
>>> + tdm0-pins-tx {
>>
>> Use consistent naming, so
>>
>> tdm_pins: tdm-0 {
>> tx-pins {
>>
>>> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
>>> + GPOEN_ENABLE,
>>> + GPI_NONE)>;
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + input-disable;
>>> + input-schmitt-disable;
>>> + slew-rate = <0>;
>>> + };
>>> +
>>> + tdm0-pins-rx {
>>
>> rx-pins {
>>
>>> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_RXD)>;
>>> + input-enable;
>>> + };
>>> +
>>> + tdm0-pins-sync {
>>
>> sync-pins {
>>
>>> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_SYNC)>;
>>> + input-enable;
>>> + };
>>> +
>>> + tdm0-pins-pcmclk {
>>
>> pcmclk-pins {
>>
>>> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_CLK)>;
>>> + input-enable;
>>> + };
>>> + };
>>> };
>>>
>>> &uart0 {
>>> @@ -221,3 +255,9 @@
>>> pinctrl-0 = <&uart0_pins>;
>>> status = "okay";
>>> };
>>> +
>>> +&tdm {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&tdm0_pins>;
>>
>> pinctrl-0 = <&tdm_pins>;
>>
>> Best regards,
>> Hal
>
> OK, I'll update these node's name in the next submit.
> Thanks.
With that fixed,
Reviewed-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
Best regards,
Hal
