On Wed, 9 Nov 2022 20:13:54 +0800, Chancel Liu wrote: > DSPCLK_DIV field in WM8962_CLOCKING1 register is used to generate > correct frequency of LRCLK and BCLK. Sometimes the read-only value > can't be updated timely after enabling SYSCLK. This results in wrong > calculation values. Delay is introduced here to wait for newest value > from register. The time of the delay should be at least 500~1000us > according to test. > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [1/1] ASoC: wm8962: Wait for updated value of WM8962_CLOCKING1 register commit: 3ca507bf99611c82dafced73e921c1b10ee12869 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
