On 2020-08-17 12:02 PM, Cezary Rojewski wrote:
On 2020-08-13 8:29 PM, Andy Shevchenko wrote:
On Wed, Aug 12, 2020 at 10:57:41PM +0200, Cezary Rojewski wrote:
...
+#define CATPT_CS_DEFAULT 0x8480040E
+#define CATPT_IMC_DEFAULT 0x7FFF0003
+#define CATPT_IMD_DEFAULT 0x7FFF0003
+#define CATPT_CLKCTL_DEFAULT 0x7FF
These looks like set of bit fields, can we describe them either in
comments
or in the values like GENMASK(x, y) | BIT(z) ?
Let's go with the latter. As explained below, I don't have much info in
regard to re-setting registers to their defaults. This knowldge might
come in time (and a ton of testing) but certainly, won't be part of this
release.
One issue might arise when describing the "reserved" regions as some
bits should not be modified by sw normally, but are part of "recommended
sequence" anyway. I'll see if there are any among '1's.
In regard to your comment related to defaults, I've provided WPT ADSP
Cspec within previously shared location:
\\10.237.149.136\AudioDspShare\crojewsk\acpi\bdw-y
Note: Chapter 50.7 describes the register map.
What I've said in the last paragraph proved true - many (in some cases
most..) bits are of 'Reserved' type. Because of spaghetti generated when
attempting to mask this, I'd stick with existing, explicit default
values which are frankly more readable.
I've added single comment above each _DEFAULT block instead:
/* defaults to reset SSP|SHIM registers to after each power cycle */
Thanks once again for your input during 'catpt' upstream process.
Please note I'll remove the Cspec from linked location as soon as I read
your response to this e-mail (probably tomorrow morning).
Czarek
