satyakam>Is it the right thing to do if i overwrite this rule as follows:
> $(PROGRAM): $(OBJECTS) $(LIBS)
> $(LD) $(LD_FLAGS) $(OBJECTS) $(LIBS) -o $static_link_file
> # some more intermediate steps here...
> $(POSLINK) $(PL_FLAGS) $static_link_file -o $@
In those situations (ie: Embedded systems) I have done this instead, "do
not make a program".
Why? Because Make's internal rules generally *THINK* very wrongly that
you are building for the host system, not cross compiling.
In the past, I have created *SINGLE* makefile, that builds both HOST and
TARGET things, I do that via "$(HOST_CC)" and $(CC)", I used AUTOCONF
for the $(CC) [cross-compile] side of things (target features, etc) and
used auto-conf to "configure" host tools in some reasonable way, is the
host cygwin/linux/mac or what?
Some argue that those are "two different configurations... and you
should do that with Autoconf + Makefiles + whatever". I think they are
pedantic nut cases. Truth is yes it can be done, but it nearly
impossible for _LEARN_ and _DUPLICATE_ . Yes, the people behind GCC did
that - It's called a Canadian cross... look it up. Utterly amazing it
works, Equally confusing to understand, and mind boggling to debug.
**BUT** Yes it works. And only they have done that, and nobody else in
their right mind has ever duplicated that work.
In contrast: Look at the Linux kernel and how it is built.
The kernel people take another (but similar) approach - much like what I
did, they have TWO different $(CC) commands, one is the $(CC) which is
the *TARGET* compiler, and $(HOSTCC), which is the *HOST* compiler, then
there are $CFLAGS, and $HOSTCFLAGS, they *DONOT* make a program. They
create something else "vmlinux"
In summary, I would do it like this:
$(PROGRAM).linker: $(OBJECTS) $(LIBS)
$(LD) ... steps -$@
%.tmp1: %linker
intermediate command to do Step 1
Example: "elf2bin"
%.tmp2: %.tmp1
intermediate command for step 2
Example: "Adding a boot loader header binary"
%.symbian: %.tmp2
final command for 'symbian files'
The above is what I have done (using autoconf), and it is quite similar
to the Linux Kernel approach (which does not use autoconf).
You might even add a "deploy" target to your makefile that "connects to
your symbian test device and downloads the application" - quite helpful
(ie: Visual Studio, for WinCE - has a "deploy button" which
downloads[deploys] your program[solution] to the device.)
I would *never* - as you describe, create a "$PROGRAM" using default
make rules, the default make rules are *ONLY* good if (a) your target
and (b) your build system are identical, that is not what you are doing.
-Duane.
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