Hello,
Please ignore my previous mail. It wasn't complete and i am sorry for the inconvenience.
I am trying to use autoconf to build for Symbian platform that involves more than 1 step at the linking stage, i.e., it has a static linking stage, followed by a post-linking stage. While the default make rule to produce an executable is just a linking stage e.g., the default rule may look something like:
$(PROGRAM): $(OBJECTS) $(LIBS)
$(LD) $(LD_FLAGS) $(OBJECTS) $(LIBS) -o $@
Is it the right thing to do if i overwrite this rule as follows:
$(PROGRAM): $(OBJECTS) $(LIBS)
$(LD) $(LD_FLAGS) $(OBJECTS) $(LIBS) -o $static_link_file
# some more intermediate steps here...
$(POSLINK) $(PL_FLAGS) $static_link_file -o $@
Is there a better way to do other than what the default make rule supports?
Also, i had to make a similar change in all the Makefile.in files. Is there a more generic way to intoduce this kind of overwriting through other autoconf templates?
regards
satyakam
--- On Mon, 3/2/09, satyakam mishra <satyakamishra@xxxxxxxxx> wrote:
From: satyakam mishra <satyakamishra@xxxxxxxxx>
Subject: overwriting default make rules
To: autoconf@xxxxxxx
Date: Monday, March 2, 2009, 10:06 AM
Hello,
I am trying to use autoconf to build for Symbian platform that involves more than 1 step at the linking stage, i.e., it has a static linking stage, followed by a post-linking stage. While the default make rule to produce an executable is just a linking stage e.g., the default rule may look something like:
$(PROGRAM): $(OBJECTS) $(LIBS)
$(LD) $(LD_FLAGS) $(OBJECTS) $(LIBS) -o $@
Is it the right thing to do if i overwrite this rule as follows:
$(PROGRAM): $(OBJECTS) $(LIBS)
$(LD) $(LD_FLAGS) $(OBJECTS) $(LIBS) -o $static_link_file
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