> -----Original Message-----
> From: Pierre-Louis Bossart <pierre-louis.bossart@xxxxxxxxx>
> Sent: Saturday, January 18, 2025 12:11 AM
> To: Bard Liao <yung-chuan.liao@xxxxxxxxxxxxxxx>; linux-sound@xxxxxxxxxxxxxxx;
> vkoul@xxxxxxxxxx
> Cc: vinod.koul@xxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Liao, Bard
> <bard.liao@xxxxxxxxx>
> Subject: Re: [PATCH v2 0/2] soundwire: set frame shape and divider based on
> actual clk
>
> On 1/14/25 12:16 AM, Bard Liao wrote:
> > Set frame shape and clock divider based on actual clock frequency. And
> > with that change, we can support ckock change in Intel platforms.
> >
> > v2:
> > - Mave the check before writing the divider registers
> > - Remove the 'freq' intermediate variable which is multiplied by two
> > after divided by two.
> >
> > Bard Liao (2):
> > soundwire: cadence_master: set frame shape and divider based on actual
> > clk freq
> > Revert "soundwire: intel_auxdevice: start the bus at default
> > frequency"
>
> This looks fine so
>
> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@xxxxxxxxx>
>
> but one additional question: what is the default start frequency? There is an
> expectation in SoundWire 1.2 that the bus starts at the slowest speed to allow
> for potential programming of PHY registers before bumping the speed to a
> higher rate. I don't recall what is typically listed in the _DSD properties, it'd be a
> mistake to start blindly with the first listed value if it happens to be the max
> rate.
Currently, we start with the first listed value. I checked the listed
values, and the first value is the slowest and the latter is faster.
But, yes, I agree that we can't rely on the _DSD properties.
Let's sort it when we get the values.
>
> > drivers/soundwire/cadence_master.c | 22 +++++++++++++++++++---
> > drivers/soundwire/intel_auxdevice.c | 21 ---------------------
> > 2 files changed, 19 insertions(+), 24 deletions(-)
> >
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