Re: [PATCH v2 2/4] clk: fsl-sai: Add i.MX8M support with 8 byte register offset

[Peng Fan <peng.fan@xxxxxxxxxxx>]

On Thu, Dec 26, 2024 at 05:22:22PM +0100, Marek Vasut wrote:
>The i.MX8M/Mini/Nano/Plus variant of the SAI IP has control registers
>shifted by +8 bytes and requires additional bus clock. Add support for
>the i.MX8M variant of the IP with this register shift and additional
>clock.
>
>Signed-off-by: Marek Vasut <marex@xxxxxxx>

Reviewed-by: Peng Fan <peng.fan@xxxxxxx>