Hi, On Fri, Jun 07, 2024 at 10:04:43AM GMT, Matteo Martelli wrote: > Maxime Ripard wrote: > > > - /* > > > - * DAI clock polarity > > > - * > > > - * The setup for LRCK contradicts the datasheet, but under a > > > - * scope it's clear that the LRCK polarity is reversed > > > - * compared to the expected polarity on the bus. > > > - */ > > > > I think we should keep that comment somewhere. > > I think that keeping that comment would be very misleading since the LRCLK > setup would not contradict the datasheet anymore [1][2]. > > Also, do you recall any details about the mentioned scope test setup? Was i2s > mode tested in that occasion? It would help clarify the situation. I can't remember if I tested i2s, I think I did though. But most of the work was done on either TDM or DSP modes, and I remember very clearly that the LRCK polarity was inverted compared to what Allwinner documents. So the doc was, at best, misleading for these formats and we should keep the comments. Maxime
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