Maxime Ripard wrote:
> > - /*
> > - * DAI clock polarity
> > - *
> > - * The setup for LRCK contradicts the datasheet, but under a
> > - * scope it's clear that the LRCK polarity is reversed
> > - * compared to the expected polarity on the bus.
> > - */
>
> I think we should keep that comment somewhere.
I think that keeping that comment would be very misleading since the LRCLK
setup would not contradict the datasheet anymore [1][2].
Also, do you recall any details about the mentioned scope test setup? Was i2s
mode tested in that occasion? It would help clarify the situation.
Could anyone verify this patch against H3/H6 SoCs?
[1]: https://linux-sunxi.org/images/4/4b/Allwinner_H3_Datasheet_V1.2.pdf
section 8.6.7.2
[2]: https://linux-sunxi.org/images/4/46/Allwinner_H6_V200_User_Manual_V1.1.pdf
section 7.2.5.2
Thanks,
Matteo Martelli
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