On 03/04/2013 08:39 PM, Laine Stump wrote: > On 03/04/2013 11:51 AM, Ján Tomko wrote: >> On 02/19/13 03:25, liguang wrote: >>> if some devices specify a pci bus number that >>> haven't been defined by a pci-bridge controller >>> then fill the required correct controller info >>> silently. >>> >>> Acked-by: Daniel P. Berrange <berrange@xxxxxxxxxx> >>> Signed-off-by: liguang <lig.fnst@xxxxxxxxxxxxxx> >>> --- >> This will only add bridges for the explictly mentioned buses, which >> would mean we could have buses 0 and 6 with no buses between them. >> Maybe we should add them the way we add disk controllers - find the >> highest index and add all bridges with indexes from 1 to max. > > But each pci bridge device takes up another slot, which we may not want > to give up. (Although arguably, once we have pci-bridge devices, we can > create as many slots as we like :-) > > > Is there some advantage to having all the buses filled in (other than > similarity to what's done for other types of controllers)? > Okay, I naively thought that the bus numbers visible in the guest are assigned sequentially, but it's a bit more complicated than that. http://www.tldp.org/LDP/tlk/dd/pci.html#pci-pci-bus-numbering If we don't need the 'buses' (which would be just bridge indexes in this case) to match the buses visible in guest, then having holes in them is fine. If we do, things get more complicated, since we should a) arrange the bridges in a way that would preserve index<->bus mapping (The easiest way to do is to do a cascade of bridges, but it might look ugly and have performance issues. But it might be necessary when hotplugging) b) check if the user-specified bridges with addresses fit within this arrangement Is this a requirement or just a convenience that's not worth the trouble? Jan -- libvir-list mailing list libvir-list@xxxxxxxxxx https://www.redhat.com/mailman/listinfo/libvir-list