Re: [PATCH 08/13] conf: Parse and format HMAT

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On 7/3/20 11:23 AM, Daniel P. Berrangé wrote:
On Wed, Jun 24, 2020 at 03:49:06PM +0200, Michal Privoznik wrote:
To cite ACPI specification:

   Heterogeneous Memory Attribute Table describes the memory
   attributes, such as memory side cache attributes and bandwidth
   and latency details, related to the System Physical Address
   (SPA) Memory Ranges. The software is expected to use this
   information as hint for optimization.

According to our upstream discussion [1] this is exposed under
<numa/> as <cache/> under NUMA <cell/> and <latency> or
<bandwidth/> under numa/latencies.

1: https://www.redhat.com/archives/libvir-list/2020-January/msg00422.html

Signed-off-by: Michal Privoznik <mprivozn@xxxxxxxxxx>
---
  docs/formatdomain.html.in                  |  88 ++++++
  docs/schemas/cputypes.rng                  | 110 ++++++-
  src/conf/numa_conf.c                       | 350 ++++++++++++++++++++-
  src/conf/numa_conf.h                       |  33 ++
  src/libvirt_private.syms                   |   6 +
  tests/qemuxml2argvdata/numatune-hmat.xml   |  52 +++
  tests/qemuxml2xmloutdata/numatune-hmat.xml |   1 +
  tests/qemuxml2xmltest.c                    |   1 +
  8 files changed, 625 insertions(+), 16 deletions(-)
  create mode 100644 tests/qemuxml2argvdata/numatune-hmat.xml
  create mode 120000 tests/qemuxml2xmloutdata/numatune-hmat.xml
diff --git a/tests/qemuxml2argvdata/numatune-hmat.xml b/tests/qemuxml2argvdata/numatune-hmat.xml
new file mode 100644
index 0000000000..b20ca0e439
--- /dev/null
+++ b/tests/qemuxml2argvdata/numatune-hmat.xml
@@ -0,0 +1,52 @@
+<domain type='qemu'>
+  <name>QEMUGuest</name>
+  <uuid>c7a5fdb2-cdaf-9455-926a-d65c16db1809</uuid>
+  <memory unit='KiB'>8388608</memory>
+  <currentMemory unit='KiB'>8388608</currentMemory>
+  <vcpu placement='static'>12</vcpu>
+  <os>
+    <type arch='x86_64' machine='pc'>hvm</type>
+    <boot dev='hd'/>
+  </os>
+  <features>
+    <acpi/>
+    <apic/>
+    <pae/>
+  </features>
+  <cpu>
+    <numa>
+      <cell id='0' cpus='0-3' memory='2097152' unit='KiB'>
+        <cache level='1' associativity='direct' policy='writeback'>
+          <size value='10' unit='KiB'/>
+          <line value='8' unit='B'/>
+        </cache>
+      </cell>
+      <cell id='1' cpus='4-7' memory='2097152' unit='KiB'/>
+      <cell id='2' cpus='8-11' memory='2097152' unit='KiB'/>
+      <cell id='3' memory='2097152' unit='KiB'/>
+      <cell id='4' memory='2097152' unit='KiB'/>
+      <cell id='5' memory='2097152' unit='KiB'/>
+      <latencies>
+        <latency initiator='0' target='0' type='access' value='5'/>
+        <latency initiator='0' target='0' cache='1' type='access' value='10'/>
+        <bandwidth initiator='0' target='0' type='access' value='204800' unit='KiB'/>
+      </latencies>

Functionally the XML looks find to me, but I was just thinking it looks
a bit wierd to have <bandwidth> under a <latencies> wrapper. I'm not
entirely sure what better name we should use - perhaps "interconnects" ?

        <interconnects>
          <latency initiator='0' target='0' type='access' value='5'/>
          <latency initiator='0' target='0' cache='1' type='access' value='10'/>
          <bandwidth initiator='0' target='0' type='access' value='204800' unit='KiB'/>
        </interconnects>

any other ideas ?

That sounds better. Or we can admit this is HMAT an have <hmat/> instead <interconnects/>? But that won't be much future proof so your suggestion sound better.

Michal




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