[PATCH] cpu: add CLZERO CPUID support for AMD platforms (libvirt 4.5)

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Qemu commit e900135dcfb67 ("i386: Add CPUID bit for CLZERO and XSAVEERPTR")
adds support for CLZERO CPUID bit. This commit extends support for this
bit in libvirt.

This patch is based off of libvirt-4.5 tree.

Signed-off-by: Ani Sinha <ani.sinha@xxxxxxxxxxx>

---
 src/cpu/cpu_map.xml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 088c820..c251cb7 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -431,6 +431,9 @@
     <feature name='virt-ssbd'>
       <cpuid eax_in='0x80000008' ebx='0x02000000'/>
     </feature>
+    <feature name='clzero'>
+      <cpuid eax_in='0x80000008' ebx='0x00000001'/>
+    </feature>
 
     <!-- models -->
     <model name='486'>
@@ -1685,6 +1688,7 @@
       <feature name='bmi2'/>
       <feature name='clflush'/>
       <feature name='clflushopt'/>
+      <feature name='clzero'/>
       <feature name='cmov'/>
       <feature name='cr8legacy'/>
       <feature name='cx16'/>
@@ -1756,6 +1760,7 @@
       <feature name='bmi2'/>
       <feature name='clflush'/>
       <feature name='clflushopt'/>
+      <feature name='clzero'/>
       <feature name='cmov'/>
       <feature name='cr8legacy'/>
       <feature name='cx16'/>
-- 
1.9.4


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