#102: Inclusion of Automatic Device Model Synthesizer (ADMS) to improve Verilog-
AMS support
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Reporter: chitlesh | Owner: chitlesh
Type: defect | Status: assigned
Priority: major | Milestone: Fedora 13
Component: ASIC | Version: devel
Resolution: | Keywords: verilog-ams
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Changes (by chitlesh):
* status: new => assigned
Comment:
1- package review request -
https://bugzilla.redhat.com/show_bug.cgi?id=626068
2- QUCS package was updated
3- waiting for upstream's input
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Ticket URL: <https://fedorahosted.org/fedora-electronic-lab/ticket/102#comment:1>
Free Electronic Lab <https://fedorahosted.org/fedora-electronic-lab>
Design, Simulate and Program electronics.
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