#102: Inclusion of Automatic Device Model Synthesizer (ADMS) to improve Verilog- AMS support -------------------------+-------------------------------------------------- Reporter: chitlesh | Owner: chitlesh Type: defect | Status: new Priority: major | Milestone: Fedora 13 Component: ASIC | Version: devel Keywords: verilog-ams | -------------------------+-------------------------------------------------- = bug description = FEL lacks Verilog-AMS support = bug analysis = mot-adms provides an Automatic Device Model Synthesizer (ADMS) which turns Verilog-A models into a C API for any simulator to understand and process the behavioral description. That said, the QUCS and ngspice packages currently available under the FEL umbrella can be used to import Verilog-A description from admsXml's outputs. = fix recommendation = - 1- package mot-adms - 2- tweak FEL's QUCS to include *.xml - 3- talk to ngspice's upstream to seek a possible plugin like behavioral of adms usage for the user. -- Ticket URL: <https://fedorahosted.org/fedora-electronic-lab/ticket/102> Free Electronic Lab <https://fedorahosted.org/fedora-electronic-lab> Design, Simulate and Program electronics. _______________________________________________ electronic-lab mailing list electronic-lab@xxxxxxxxxxxxxxxxxxxxxxx https://admin.fedoraproject.org/mailman/listinfo/electronic-lab