Hi Shakthi
I will also be presenting at Barton Hill on 21st, but on a different
topic. I will bring a full chip plot and also be taped-lid sample for
the same chip, students can get an idea of how a finished layout and
corresponding sample device will look like.
Regards
David
------------------------------
Message: 3
Date: Wed, 4 Mar 2009 22:42:50 +0100
From: Chitlesh GOORAH <chitlesh@xxxxxxxxxxxxxxxxx>
Subject: Re: [RFC] Introducing FEL to
prospective students
To: Shakthi Kannan <shakthimaan@xxxxxxxxx>
Cc: fedora-electronic-lab-list@xxxxxxxxxx
Message-ID:
<13dbfe4f0903041342l6a6e7e0x82aad9aee8d33495@xxxxxxxxxxxxxx>
Content-Type: text/plain; charset=UTF-8
On Wed, Mar 4, 2009 at 12:47 PM, Shakthi Kannan wrote:
Hi,
I have the opportunity to present FOSS electronic tools to few
colleges in India, and I would like to use FEL as an example. I would
like to hear from you all on which tools can be demoed. I can address
the same in an hours' time frame.
I shall pass on this mailing list info to the students, so that they
can correspond for any help, support, or package development that
requires contribution or that they might be interested in.
Appreciate any inputs in this regard,
Thanks!
Hello Shakthi,
This is great news :) May I know when will you conduct that presentation ?
As for which tool to demo? I would rather say all of them (thinking of
our upstream developers :) )
Maybe what you can do is, make up an imaginary project and talk about
the FOSS tools available for this particular project. Then you can go
deeper explaining each of the tools (maybe choose one of them for
demo) you mentioned and what type of engineers could use them. Then
you can make up another imaginary project to include tools that you've
missed in the previous example.
FYI: I'm writing a TechReport on how I'm using features of FEL11 and
geda/gaf to propose a possible EDA solution for post-tapeout of chips.
Up till now all we have been proposing is pre-tapeout solutions with
FEL. For the last 2 months, my colleagues are running F11(rawhide) in
our Testing&Validation unit and using the perl hardware modules of
F11, rawhide's gtkwave and geda/gaf to validate 65nm chips. I hope I
could finish the TechReport paper in time for you.
cheers,
Chitlesh
------------------------------
Message: 4
Date: Thu, 5 Mar 2009 10:46:40 +0530
From: Shakthi Kannan <shakthimaan@xxxxxxxxx>
Subject: Re: [RFC] Introducing FEL to
prospective students
To: Chitlesh GOORAH <chitlesh@xxxxxxxxxxxxxxxxx>
Cc: fedora-electronic-lab-list@xxxxxxxxxx
Message-ID:
<d16b1c80903042116y5da5b0dl42825645cde07dbb@xxxxxxxxxxxxxx>
Content-Type: text/plain; charset=UTF-8
Hi Chitlesh,
--- On Thu, Mar 5, 2009 at 3:12 AM, Chitlesh GOORAH
<chitlesh@xxxxxxxxxxxxxxxxx> wrote:
| This is great news :) May I know when will you conduct that presentation ?
\--
1. I'll update them here?
http://fedoraproject.org/wiki/FedoraEvents
One workshop is confirmed at Government Engineering College, Barton
Hill, Thiruvananthapuram, Kerala on Saturday, March 21, 2009.
2. I have a copy of Fedora-10-Livedvd-FEL. I can make copies of the
same and distribute. What is the policy on re-printing and using the
FEL CD/DVD cover? Printed label helps in *branding* :)
3. I will require a list of TODO activities for FEL, and then we can
work out a process to guide interested enthusiasts.
---
| As for which tool to demo? I would rather say all of them (thinking of
| our upstream developers :) )
\--
Sure.
---
| I hope I
| could finish the TechReport paper in time for you.
\--
Great! That will be helpful. I joined the Fedora Ambassador project as
well, since you had asked me about it earlier.
Regards,
SK
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