Hi Chitlesh, Hi Max --
Pardon me for butting in here. Maybe I can help clarify things.
The Fedora Electronics Lab is a particular Linux distro released by
the Fedora team which is specialized towards electronics designers.
That is, besides the usual set of applications you get from stock
Fedora Core, FEL also bundles a bunch of open-source applications used
for electronics design. This includes lots of things:
* Chip design
-- Magic (Chip layout editor. Very old but completely functional
and kept up to date by a team of folks at various universities.)
-- Alliance (Chip design suite from French university. Includes
layout tools, VHDL compiler & synthesis, and other tools)
-- Toped (Chip layout editor)
* Simulation (Chip and board level)
-- Icarus Verilog (Verilog compiler and simulation engine)
-- GHDL (VHDL compiler providing ability to simulate)
-- Alliance (VHDL simulation engine)
-- GTKWave (Waveform viewer used with simulation tools)
-- ngSPICE (Berkeley SPICE ported to Linux)
-- GnuCap (Next-gen analog simulator)
-- QUCS (Analog/digital/microwave simulation package from German
university)
* PCB design
-- gEDA/gaf (schematic entry, attribute management, netlisting to
20 different netlist formats)
-- gEDA/PCB (PCB layout editor)
-- Kicad (schematic through layout PCB design suite)
-- gerbv (Gerber viewer)
* Embedded system tools
I have certainly missed a few tools included in FEL.
In any event, FEL is big news for electronics designers. There is
lots of activity at the grassroots level as EEs discover the tools and
try them out. Here's a recent presentation from an engineer at Agilent:
http://en.oreilly.com/oscon2008/public/schedule/detail/2777
There's plenty of material in FEL for more than a blog posting and an
article.
Hope this helps,
Stuart Brorson
gEDA Project
On Wed, 10 Dec 2008, Max Maxfield wrote:
Hi there Chitlesh -- thanks for your email -- this is very interesting.
Now, is your EDA software predominantly targeted at ASIC designs, or does it also cover Structured ASICs and FPGAs?
If ASIC only, then I could do a "Chips and Dips" piece for use on the iDESIGN section of the www.ChipDesignMag.com website (just scroll down until you see the iDESIGN section).
Alternatively, if it's also of interest for Structured ASIC and/or FPGA designs, then I can do a blog on www.pldesignline.com
Regards -- Max
==========================
Max The Magnificent
TechBites Interactive
495 Production Ave
Madison, AL 35758, USA
Tel: 256-319-0257 (or 0255 or 0258)
-----Original Message-----
From: chitlesh@xxxxxxxxx [mailto:chitlesh@xxxxxxxxx] On Behalf Of Chitlesh GOORAH
Sent: Wednesday, December 10, 2008 3:05 PM
To: max@xxxxxxxxxxxxx
Cc: fedora-electronic-lab-list
Subject: comments: EDA Rescue Plan
Hello Clive Maxfield,
I have just read your post [1] "EDA Rescue Plan", which got my
attention. However, like you I was more interested on what are the EDA
tools Blue Pearl are proposing.
Since you mentioned that you are constantly being surprised to
discover established EDA vendors, let me introduce you to "Fedora
Electronic Lab". [2]
Fedora Electronic Lab (FEL), being a subset of the Fedora Project,
strives to give users the best experience with opensource EDA tools.
Each 6 months, the Fedora Project releases a new version of our Linux
distribution "Fedora", together with a special LiveDVD dedicated for
electronics. This LiveDVD available for free is intended to serve as
an electronic simulation platform, on which users can work on their
ASIC design, embedded design,.. . While Fedora is engineered by Red
Hat Inc. (the leader in Entreprise Linux) together with the community,
our users benefit freely the cutting-edge technologies Red Hat is
working on their RHEL 6. Our latest statistics proved that Fedora has
more than 9.5 million users around the world and FEL has at least 1%
of the user share.
We (as non-profit community members) packaged opensource tools and
work with their developers to ensure interoperability between our
tools and that our users can deploy quickly and efficiently with our
mature RPM/YUM deployment mechanism. In a matter of fact, we also
provide marketing facilities as much as I can for those developers.
(This email is an example). The developers of FEL's tools are working
hard to keep their applications up-to-date with such a technological
race in the EDA world. We don't claim to be in competition with
Synopsys or Cadence, however we follow them closely and see how we can
satisfy the needs of our users (end-users, students, lecturers, ..)
Not only we provide EDA tools for free, but also a Linux Operating
system which is the upstream of Red Hat Entreprise Linux. While mostly
all ASIC design centers run RHEL for their Cadence and Synopsys tools,
we believe our users will enjoy the same professional experience while
designing their chips or embedded code on Fedora Electronic Lab.
I would appreciate if you could spare some time writing a post about
Fedora Electronic Lab. Since we are a non-profit organization, your
readers would be interested in our EDA solutions whether the latter
suits their personal use or deployment in an academic institutions.
I welcome you to visit FEL's website at [2] and if there are any way
we can assist you please let me know.
[1]: http://www.pldesignline.com/212300434
[2]: http://chitlesh.fedoraproject.org/FEL
[3]: http://fedoraproject.org
Kind Regards,
Chitlesh GOORAH
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