On Wed, Dec 10, 2008 at 10:43 PM, Max Maxfield wrote: > Hi there Chitlesh -- thanks for your email -- this is very interesting. > > Now, is your EDA software predominantly targeted at ASIC designs, or does it also cover Structured ASICs and FPGAs? Hello Max, Thank you. I would like to precise one thing here. It is not _my_ EDA software, but a collection of EDA tools from : - toped layout community - gEDA & gaf community - opencircuitdesign community - .. Thereby I don't think it is wise to name is _my_ EDA software, but software under the Fedora Electronic Lab unbrella. Everyone tried to help as much as they could, so they deserve the credit as well. > > If ASIC only, then I could do a "Chips and Dips" piece for use on the iDESIGN section of the www.ChipDesignMag.com website (just scroll down until you see the iDESIGN section). "Chips and Dips" is mosta appropriate since FEL has no solutions for FPGA yet. Kind regards, Chitlesh _______________________________________________ Fedora-electronic-lab-list mailing list Fedora-electronic-lab-list@xxxxxxxxxx https://www.redhat.com/mailman/listinfo/fedora-electronic-lab-list
