On Wed, 14 Apr 2004, Ulrich Teichert wrote:
> first, sorry for the delay. I had a short vacation over easter.
Not a problem.
> > > (gdb) info all-registers
> > > eax 0xff 255
> > > ecx 0x3d5 981
> > > edx 0x3d5 981
> > > ebx 0x3d5 981
> > > [snip]
> > > The loop starts at 0x401a9759 and goes to 0x401a975e. If I jump to
> > > 0x401a9760 in the debugger, the server terminates. So, it reads 0x3d5,
> > > whatever that is (probably I/O stuff) and the test never succeeds.
> > Looks like it's looping in function gfx_vga_mode_switch() near the tail end of
> > xc/programs/Xserver/hw/xfree86/drivers/ncs/gfx/vga_gu1.c, part of which reads
> > /* WAIT UNTIL SOFTVGA HAS VALIDATED MODE IF ENDING MODE SWITCH */
> > /* This is for VSA1 only, where SoftVGA waits until the next */
> > /* vertical blank to validate the hardware state. */
> >
> > if ((!active) && (!(gu1_detect_vsa2()))) {
> > OUTB(crtcindex, 0x33);
> > while (INB(crtcdata) & 0x80) ;
> > }
> > Change this to ...
> > /* WAIT UNTIL SOFTVGA HAS VALIDATED MODE IF ENDING MODE SWITCH */
> > /* This is for VSA1 only, where SoftVGA waits until the next */
> > /* vertical blank to validate the hardware state. */
> >
> > if ((!active) && (!(gu1_detect_vsa2()))) {
> > int cnt = 256;
> >
> > OUTB(crtcindex, 0x33);
> > while (--cnt && (INB(crtcdata) & 0x80));
> > }
> > ... and see what happens.
> Great! Now, it terminates correctly,
> Thanks a million,
Well, that's fine, but my suggestion is only a workaround. I don't have docs
for this chip, but it would be better to know what CRTC 0x33 is, what this code
is waiting for (0x80 isn't my idea of descriptive), and why the hardware isn't
turning off this bit.
Marc.
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