This commit added support for cpu physical address bits control, It's
useful for VMs with huge amount of ram.
E.g.
--cpu Cascadelake-Server,maxphysaddr.mode=emulate,maxphysaddr.bits=46
Signed-off-by: Lin Ma <lma@xxxxxxxx>
---
.../cli/compare/virt-install-many-devices.xml | 1 +
.../compare/virt-install-testdriver-edgecases.xml | 4 +++-
tests/test_cli.py | 5 +++--
virtinst/cli.py | 3 +++
virtinst/domain/cpu.py | 15 ++++++++++++++-
5 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/tests/data/cli/compare/virt-install-many-devices.xml b/tests/data/cli/compare/virt-install-many-devices.xml
index a33dc16a..042410b1 100644
--- a/tests/data/cli/compare/virt-install-many-devices.xml
+++ b/tests/data/cli/compare/virt-install-many-devices.xml
@@ -194,6 +194,7 @@
<bandwidth initiator="0" target="2" cache="1" type="access" value="409600" unit="KiB"/>
</interconnects>
</numa>
+ <maxphysaddr mode="emulate" bits="46"/>
</cpu>
<clock offset="utc">
<timer name="pit" tickpolicy="catchup" present="yes"/>
diff --git a/tests/data/cli/compare/virt-install-testdriver-edgecases.xml b/tests/data/cli/compare/virt-install-testdriver-edgecases.xml
index f129d089..3cc385c0 100644
--- a/tests/data/cli/compare/virt-install-testdriver-edgecases.xml
+++ b/tests/data/cli/compare/virt-install-testdriver-edgecases.xml
@@ -17,7 +17,9 @@
<pae/>
<vmport state="off"/>
</features>
- <cpu mode="host-passthrough" migratable="on"/>
+ <cpu mode="host-passthrough" migratable="on">
+ <maxphysaddr mode="passthrough"/>
+ </cpu>
<clock offset="utc"/>
<pm>
<suspend-to-mem enabled="no"/>
diff --git a/tests/test_cli.py b/tests/test_cli.py
index 259ac78c..0c7999c6 100644
--- a/tests/test_cli.py
+++ b/tests/test_cli.py
@@ -511,7 +511,8 @@ numa.interconnects.latency0.initiator=0,numa.interconnects.latency0.target=0,num
numa.interconnects.latency1.initiator=0,numa.interconnects.latency1.target=2,numa.interconnects.latency1.cache=1,numa.interconnects.latency1.type=access,numa.interconnects.latency1.value=10,numa.interconnects.latency1.unit=ns,\
numa.interconnects.bandwidth0.initiator=0,numa.interconnects.bandwidth0.target=0,numa.interconnects.bandwidth0.type=access,numa.interconnects.bandwidth0.value=204800,\
numa.interconnects.bandwidth1.initiator=0,numa.interconnects.bandwidth1.target=2,numa.interconnects.bandwidth1.cache=1,numa.interconnects.bandwidth1.type=access,numa.interconnects.bandwidth1.value=409600,numa.interconnects.bandwidth1.unit=KiB,\
-cache.mode=emulate,cache.level=3
+cache.mode=emulate,cache.level=3,\
+maxphysaddr.mode=emulate,maxphysaddr.bits=46
--numatune 1,2,3,5-7,^6,mode=strict,\
@@ -880,7 +881,7 @@ c.add_compare("--pxe "
# Hitting test driver specific output
c.add_compare("--connect " + utils.URIs.test_suite + " "
-"--cpu host-passthrough,migratable=on " # migratable=on is only accepted with host-passthrough
+"--cpu host-passthrough,migratable=on,maxphysaddr.mode=passthrough " # migratable=on is only accepted with host-passthrough
"--seclabel label=foobar.label,a1,z2,b3,relabel=yes,type=dynamic " # fills in default model=testModel
"--tpm default " # --tpm default when domcaps missing
"",
diff --git a/virtinst/cli.py b/virtinst/cli.py
index 042b500f..4edeb635 100644
--- a/virtinst/cli.py
+++ b/virtinst/cli.py
@@ -2386,6 +2386,9 @@ class ParserCPU(VirtCLIParser):
cls.add_arg("cache.level", "cache.level")
cls.add_arg("cache.mode", "cache.mode")
+ cls.add_arg("maxphysaddr.mode", "maxphysaddr.mode")
+ cls.add_arg("maxphysaddr.bits", "maxphysaddr.bits")
+
# CPU features
# These are handled specially in _parse
cls.add_arg("force", None, lookup_cb=None, cb=cls.set_feature_cb)
diff --git a/virtinst/domain/cpu.py b/virtinst/domain/cpu.py
index 5de42b4e..c635932e 100644
--- a/virtinst/domain/cpu.py
+++ b/virtinst/domain/cpu.py
@@ -102,6 +102,17 @@ class _CPUFeature(XMLBuilder):
policy = XMLProperty("./@policy")
+class _CPUMaxphysaddr(XMLBuilder):
+ """
+ Class for generating XML for <cpu> child node <maxphysaddr>.
+ """
+ XML_NAME = "maxphysaddr"
+ _XML_PROP_ORDER = ["mode", "bits"]
+
+ mode = XMLProperty("./@mode")
+ bits = XMLProperty("./@bits", is_int=True)
+
+
##############
# NUMA cells #
##############
@@ -211,7 +222,7 @@ class DomainCpu(XMLBuilder):
_XML_PROP_ORDER = ["mode", "match", "check", "migratable",
"model", "model_fallback", "model_vendor_id", "vendor",
"topology", "cache", "features",
- "cells", "latencies", "bandwidths"]
+ "cells", "latencies", "bandwidths", "maxphysaddr"]
##################
@@ -242,6 +253,8 @@ class DomainCpu(XMLBuilder):
latencies = XMLChildProperty(_NUMALatency, relative_xpath="./numa/interconnects")
bandwidths = XMLChildProperty(_NUMABandwidth, relative_xpath="./numa/interconnects")
+ maxphysaddr = XMLChildProperty(_CPUMaxphysaddr, is_single=True)
+
#############################
# Special CPU mode handling #
--
2.26.2
