Re: [PATCH v4 2/2] lscpu-arm: Remove hard corded model name of Cortex family and X-Gene

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On Mon, Nov 09, 2020 at 01:51:27PM -0500, Masayoshi Mizuma wrote:
> On Mon, Nov 09, 2020 at 05:23:31PM +0100, Karel Zak wrote:
> > On Sun, Nov 08, 2020 at 10:04:03PM -0500, Masayoshi Mizuma wrote:
> > > From: Masayoshi Mizuma <m.mizuma@xxxxxxxxxxxxxx>
> > > 
> > > Remove hard corded model name of Cortex family and X-Gene so that
> > > lscpu can show the model name using Processor Version of SMBIOS Type4.
> > 
> > Now I see on my system (Fedora) that:
> > 
> >  $ll /sys/firmware/dmi/entries/4-0/raw
> >  -r-------- 1 root root 0 Nov  9 17:19 /sys/firmware/dmi/entries/4-0/raw
> > 
> > it means it's not readable for non-root users. So, I guess the
> > hardcoded table can be still usable as a fallback solution if we want
> > to provide readable information for non-root.
> 
> Thanks, it's a really good point...
> lscpu changes the Vendoer ID and Model name depends on the user privilege.
> I think it may confuse users.
> 
> Why don't we remove Vendor ID and Model name when non-root runs lscpu?
> Or add a message to get Vendor ID and Model name like as follows?
> 
>     $ lscpu
>     ...
>     Vendor ID:                       (Need to run as root to show)
>     Model name:                      (Need to run as root to show)
>     ...

It seems like user unfriendly solution, especially if it works in the
current versions.

And in some cases model name is important to get readable output. Now,
I'm working on new lscpu to get support for system with multiple CPU
models in one system. For example Cortex-A53 and Cortex-A72 together:

Architecture:          x86_64
  Byte Order:          Little Endian
CPU(s):                6
  On-line CPU(s) list: 0-5
Vendor ID:             ARM
Model name:            Cortex-A53
  Model:               4
  Thread(s) per core:  1
  Core(s) per socket:  4
  Socket(s):           1
  Stepping:            r0p4
  CPU max MHz:         1416.0000
  CPU min MHz:         408.0000
  BogoMIPS:            48.00
  Flags:               fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
Model name:            Cortex-A72
  Model:               2
  Thread(s) per core:  1
  Core(s) per socket:  2
  Socket(s):           1
  Stepping:            r0p2
  CPU max MHz:         1800.0000
  CPU min MHz:         408.0000
  BogoMIPS:            48.00
  Flags:               fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
NUMA:                  
  NUMA node(s):        1
  NUMA node0 CPU(s):   0-5
Vulnerabilities:       
  Itlb multihit:       Not affected
  L1tf:                Not affected
  Mds:                 Not affected
  Meltdown:            Not affected
  Spec store bypass:   Not affected
  Spectre v1:          Mitigation; __user pointer sanitization
  Spectre v2:          Mitigation; Branch predictor hardening
  Tsx async abort:     Not affected



This output is generated from /sys and /proc dump where we have 0x
values in cpuinfo.

I guess we can use firmware as primary a source if available,
otherwise static tables with names, or print raw values (e.g. 0xd08)
as the last possibility.

lscpu is not marketing tool, we can use technical information there,
it' better than hide anything ;-)

    Karel

-- 
 Karel Zak  <kzak@xxxxxxxxxx>
 http://karelzak.blogspot.com




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