Re: [PATCH] use SMBIOS tables on ARM for lscpu

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On Tue, Sep 29, 2020 at 01:35:28PM +0200, Karel Zak wrote:
On Thu, Sep 24, 2020 at 04:56:17PM -0500, Jeffrey Bastian wrote:
 sys-utils/lscpu-arm.c | 88 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 87 insertions(+), 1 deletion(-)

Applied, but I did some changes to the code to be more robust and to
avoid dmi_header duplication in lscpu-arm.c and lscpu-dmi.c.

https://github.com/karelzak/util-linux/commit/367c85c472869b75eaf770d4be0b360e30710b95

Please, test it with your environment. I have no any ARM right now.

Thanks!  I wasn't sure how you wanted to handle the dmi duplicated code,
but I like what you did.

I tested this on several ARM servers and it worked well.  Note the
Amazon AWS m6g.large instance does not have a Type 4 entry in the SMBIOS
tables, so the fall back method was used (and it also works).


[ec2-user@aws-m6g.large ~]$ ls /sys/firmware/dmi/entries/4-0
ls: cannot access '/sys/firmware/dmi/entries/4-0': No such file or directory
[ec2-user@aws-m6g.large ~]$ ./lscpu | grep -e Vendor -e Model -e Stepping
Vendor ID:                       ARM
Model:                           1
Model name:                      Neoverse-N1
Stepping:                        r3p1


[root@hp-m400 ~]# ./lscpu | grep -e Vendor -e Model -e Stepping
Vendor ID:                       AppliedMicro
Model:                           1
Model name:                      X-Gene
Stepping:                        0x0


[root@lenovo-hr330a ~]# ./lscpu | grep -e Vendor -e Model -e Stepping
Vendor ID:                       Ampere(TM)
Model:                           2
Model name:                      eMAG
Stepping:                        0x3


[root@hpe-apollo-70 ~]# ./lscpu | grep -e Vendor -e Model -e Stepping
Vendor ID:                       Cavium Inc.
Model:                           1
Model name:                      Cavium ThunderX2(R) CPU CN9975 v2.1 @ 2.0GHz
Stepping:                        0x1


[root@ampere-altra ~]# ./lscpu | grep -e Vendor -e Model -e Stepping
Vendor ID:                       Ampere(TM)
Model:                           1
Model name:                      Ampere(TM) Altra(TM) Processor
Stepping:                        0x3


--
Jeff Bastian
Kernel QE - Hardware Enablement
Red Hat




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