When the R5 boot CPU on a AM62x initializes the SD/eMMC controller it is
not able to read the SCR. The command returns successfully, but the
returned data only contains 0x0. Work around this by doing the smaller
blocksize transfers using PIO.
The same DMA transfer works when doing it on the A53 CPU
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
drivers/mci/am654-sdhci.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/mci/am654-sdhci.c b/drivers/mci/am654-sdhci.c
index 9787642011..24d73f4c63 100644
--- a/drivers/mci/am654-sdhci.c
+++ b/drivers/mci/am654-sdhci.c
@@ -467,7 +467,7 @@ static int am654_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
struct am654_sdhci_plat *host = container_of(mci, struct am654_sdhci_plat, mci);
u32 command, xfer;
int ret;
- dma_addr_t dma;
+ dma_addr_t dma = SDHCI_NO_DMA;
ret = sdhci_wait_idle_data(&host->sdhci, cmd);
if (ret)
@@ -477,7 +477,10 @@ static int am654_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
sdhci_write8(&host->sdhci, SDHCI_TIMEOUT_CONTROL, 0xe);
- sdhci_setup_data_dma(&host->sdhci, data, &dma);
+ if (data && data->blocksize < 512)
+ sdhci_setup_data_pio(&host->sdhci, data);
+ else
+ sdhci_setup_data_dma(&host->sdhci, data, &dma);
sdhci_set_cmd_xfer_mode(&host->sdhci, cmd, data,
dma == SDHCI_NO_DMA ? false : true,
@@ -494,7 +497,10 @@ static int am654_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
sdhci_read_response(&host->sdhci, cmd);
sdhci_write32(&host->sdhci, SDHCI_INT_STATUS, SDHCI_INT_CMD_COMPLETE);
- ret = sdhci_transfer_data_dma(&host->sdhci, data, dma);
+ if (data && data->blocksize < 512)
+ ret = sdhci_transfer_data_pio(&host->sdhci, data);
+ else
+ ret = sdhci_transfer_data_dma(&host->sdhci, data, dma);
error:
if (ret) {
--
2.39.5
