For SD3_DAT0, add the definition for UART1_RTS and correct UART1_CTS to longer use the actual address of RTS Select Input Register. As confirmed by the i.MX manual and dts/src/arm/nxp/imx/imx6q-pinfunc.h: #define MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x09c 0x3b0 0x000 0x4 0x0 #define MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x09c 0x3b0 0x91c 0x4 0x0 Signed-off-by: Jonas Rebmann <jre@xxxxxxxxxxxxxx> --- include/mach/imx/iomux-mx6.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/mach/imx/iomux-mx6.h b/include/mach/imx/iomux-mx6.h index 991300060096a2a0e64dad7fc7d0ebe000331590..d2eacc9a33b65e7d8253fec065f70795a9ec731c 100644 --- a/include/mach/imx/iomux-mx6.h +++ b/include/mach/imx/iomux-mx6.h @@ -332,6 +332,8 @@ #define _MX6Q_PAD_EIM_D19__IPU2_CSI1_D_16 \ IOMUX_PAD(0x03B0, 0x009C, 3, 0x08C8, 0, 0) #define _MX6Q_PAD_EIM_D19__UART1_CTS \ + IOMUX_PAD(0x03B0, 0x009C, 4, 0x0000, 0, 0) +#define _MX6Q_PAD_EIM_D19__UART1_RTS \ IOMUX_PAD(0x03B0, 0x009C, 4, 0x091C, 0, 0) #define _MX6Q_PAD_EIM_D19__GPIO_3_19 \ IOMUX_PAD(0x03B0, 0x009C, 5, 0x0000, 0, 0) @@ -3796,6 +3798,7 @@ #define MX6Q_PAD_EIM_D19__IPU1_DI0_PIN8 (_MX6Q_PAD_EIM_D19__IPU1_DI0_PIN8 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__IPU2_CSI1_D_16 (_MX6Q_PAD_EIM_D19__IPU2_CSI1_D_16 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__UART1_CTS (_MX6Q_PAD_EIM_D19__UART1_CTS | MUX_PAD_CTRL(MX6Q_UART_PAD_CTRL)) +#define MX6Q_PAD_EIM_D19__UART1_RTS (_MX6Q_PAD_EIM_D19__UART1_RTS | MUX_PAD_CTRL(MX6Q_UART_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__GPIO_3_19 (_MX6Q_PAD_EIM_D19__GPIO_3_19 | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__EPIT1_EPITO (_MX6Q_PAD_EIM_D19__EPIT1_EPITO | MUX_PAD_CTRL(NO_PAD_CTRL)) #define MX6Q_PAD_EIM_D19__PL301_MX6QPER1_HRESP (_MX6Q_PAD_EIM_D19__PL301_MX6QPER1_HRESP | MUX_PAD_CTRL(NO_PAD_CTRL)) --- base-commit: a7ae043343c89e8b75904a41174b9b4cf2df35a0 change-id: 20241213-mx6q-pad-rts-96f98d2fdf5f Best regards, -- Jonas Rebmann <jre@xxxxxxxxxxxxxx>
