Today tried the following for debugging purposes: In am33xx_generic.c in arch/arm/mach-omap there is in am33xx_restart_soc() this: writel(AM33XX_PRM_RSTCTRL_RESET, AM33XX_PRM_RSTCTRL); which is 0x1 written to 0x44e00f00 and causes warm restart. I can simulate this with "mw 0x44e00f00 0x1" which shows the freeze I see (upon restart) on affected BBBs. When I change the value to 0x2 (cold restart) the affected BBBs restart successfully! Does this ring a bell for people more experiened? This is not meant as a proposed solution (Watchdog restart, Linux Kernel restart no covered, reset cause deleted/hidden(?)), more is it meant as an idea to find the cause. Poweron, cold restart working always100%, warm restart never. Regards Konstantin -- INSIDE M2M GmbH Konstantin Kletschke Berenbosteler Straße 76 B 30823 Garbsen Telefon: +49 (0) 5137 90950136 Mobil: +49 (0) 151 15256238 Fax: +49 (0) 5137 9095010 konstantin.kletschke@xxxxxxxxxxxxx http://www.inside-m2m.de Geschäftsführung: Michael Emmert, Derek Uhlig HRB: 111204, AG Hannover
