Hello Holger,
Thanks for your fix.
On 08.11.24 11:57, Holger Assmann wrote:
> Besides its power domain, the NPU node itself also needs to be disabled
> in the kernel device tree if no respective hardware is present at the
> SoC.
>
> The power domain has already been dealt with by upstream commit
> 924101c81d6e ("ARM: i.MX8MP: add feature controller support for Plus").
> This patch adds the necessary entry for the NPU node.
> > Signed-off-by: Holger Assmann <h.assmann@xxxxxxxxxxxxxx>
Reviewed-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx
Cheers,
Ahmad
> ---
> arch/arm/dts/imx8mp.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
> index 4d1f1bf588..1604fa13a5 100644
> --- a/arch/arm/dts/imx8mp.dtsi
> +++ b/arch/arm/dts/imx8mp.dtsi
> @@ -99,6 +99,10 @@ &vpumix_blk_ctrl {
> barebox,feature-gates = <&feat IMX8M_FEAT_VPU>;
> };
>
> +&npu {
> + barebox,feature-gates = <&feat IMX8M_FEAT_NPU>;
> +};
> +
> &pgc_mlmix {
> barebox,feature-gates = <&feat IMX8M_FEAT_NPU>;
> };
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
