The 64-bit SoCFPGA platforms will use reset-simple. Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx> --- drivers/reset/Kconfig | 6 ++++++ drivers/reset/Makefile | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 16c05d50f0e30cb93609c6fbaa4287975894509a..c3779f087490f57deeabf2178723983a87d0446c 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -57,4 +57,10 @@ config RESET_SCMI This driver uses SCMI Message Protocol to interact with the firmware controlling all the reset signals. +config RESET_SOCFPGA32 + bool "SoCFPGA 32-bit Reset Driver" + default ARCH_SOCFPGA && 32BIT + help + This enables the reset controller driver for 32-bit SoCFPGA platforms. + endif diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index b1668433d76af89a49ef577ad9d0cdc4af48de8d..a446cb20d0b7ddb6404fdf385498bdf6a076e34e 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_RESET_CONTROLLER) += core.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o -obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o +obj-$(CONFIG_RESET_SOCFPGA32) += reset-socfpga.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o obj-$(CONFIG_RESET_STARFIVE) += reset-starfive-vic.o obj-$(CONFIG_RESET_SCMI) += reset-scmi.o -- 2.46.0